A generic scheme for communication representation and mappingMeincke, Thomas; Jantsch, Axel; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu17th NORCHIP Conference : Oslo, Norway, 8-9 November 1999 : proceedings1999 / p. 334-339 : ill

A HW/SW partitioning technique based on hierarchical canitate selection schemeJantsch, Axel; Ellervee, Peeter; Öberg, Johnny; Hemani, Ahmed7th International Workshop on High-level Synthesis, Niagara-on-the Lake, Ontario, Canada, May 18-20, 19941994

An ad-hoc implementation of a remote laboratoryAzad, Siavoosh Payandeh; Kinks, Hannes; Tajammul, Muhammad Adeel; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 48-51 : ill http://dx.doi.org/10.1109/MSE.2015.7160015

Analog integrated circuits and signal processingEllervee, Peeter; Jervan, Gert2010

Applying FPGA partial reconfiguration for digital system simulationArhipov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 145-148 : ill

Architectural exploration tasks for on-chip embedded systemsReinsalu, Uljana; Arhipov, Anton; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 171-174 : ill

Arvutiteadlaste töötingimustest Rootsi kõrgkoolisEllervee, PeeterArvutustehnika ja Andmetöötlus1990 / 12, lk. 49-53

At-speed self-testing of high-performance pipe-lined processing architectures [Electronic resource]Gorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, Mart31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / p. 1-6 : ill [USB]

Automatic synthesis of asynchronous circuits from synchronous RTL descriptionsÖberg, Johnny; Plosila, Juha; Ellervee, PeeterProceedings 23rd NORCHIP Conference : Oulu, Finland, 21-22 November 20052005 / p. 200-205 : ill

A benchmark suite for evaluating the efficiency of test toolsKruus, Helena; Ubar, Raimund-Johannes; Ellervee, Peeter; Gorev, Maksim; Pesonen, Vadim; Devadze, Sergei; Orasson, Elmet; Brik, Marina; Min, Mart; Annus, Paul; Kruus, Margus; Meigas, KaljuBEC 2012 : 2012 13th Biennial Baltic Electronics Conference : proceedings of the 13th Biennial Baltic Electronics Conference : October 3-5, 2012, Tallinn, Estonia2012 / p. 85-88 : ill

Bottlenecks in hardware design and design automation [Electronic resource] : [slides]Ellervee, PeeterDesign and Test Technology for Dependable Hardware/Software Systems : DEDIS/DAAD Summer Academy : BTU Cottbus, Sept. 1st-12th, 20082008 / [24] p. : ill. [CD-ROM]

Bottlenecks in hardware design and design automation (Hardware synthesis: no pain, no gain)Ellervee, PeeterCREDES Summer School : Dependable Systems Design : handouts2011 / p. 49-58 : ill

CLD : an accurate, cost-effective and scalable run-time Cache Leakage DetectorShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : Vienna, Austria, 07-09 April 20212021 / p. 127-132 : ill https://doi.org/10.1109/DDECS52668.2021.9417071

Clock manipulation for heterogeneous emulation environmentEllervee, Peeter; Arhipov, Anton; Tammemäe, KalleProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 213-216 : ill https://ieeexplore.ieee.org/abstract/document/4126984

Code compaction within CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, PeeterProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 133-136 : ill

Code coverage analysis using high-level decision diagrams [Electronic resource]Raik, Jaan; Reinsalu, Uljana; Ubar, Raimund-Johannes; Jenihhin, Maksim; Ellervee, Peeter2008 IEEE Design and Diagnostics of Electronic Circuits and Systems : Bratislava, Slovakia, April 16-18, 20082008 / p. 201-207 : ill. [CD-ROM]

Communication modelling and synthesis for NoC-based systems with real-time constraintsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertProceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany2011 / p. 237-242 : ill https://www.semanticscholar.org/paper/Communication-modelling-and-synthesis-for-NoC-based-Tagel-Ellervee/71f9595d88ed06b63367b87188b218fe6da6bd97

A comparison of six languages for system level description of telecom applicationsJantsch, Axel; Kumar, Shashi; Sander, Ingo; Svantesson, Bengt; Öberg, Johnny; Hemani, Ahmed; Ellervee, Peeter; O'Nils, MattiasElectronic chips & systems design languages2001 / p. 181-192 : ill

Contention aware scheduling for NoC-based real-time systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertNorchip 2011 : 14-15 November 2011, Lund2011 / [4] p.: ill

Contention aware scheduling for NoC-based real-time systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve2011 / p. 75-78 : ill

Controller synthesis in control and memory centric high level synthesis systemEllervee, Peeter; Hemani, Ahmed; Kumar, Anshul; Svantesson, Bengt; Öberg, Johnny; Tenhunen, HannuBEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings1996 / p. 393-396: ill

Customizable compression architecture for efficient configuration in CGRAsJafri, Syed Mohammad Asad Hassan; Ellervee, Peeter2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines : FCCM 2014 : 11-13 May 2014, Boston, Massachusetts, USA : proceedings2014 / p. 31 : ill

DAC 2000 - 37th Design Automation ConferenceEllervee, PeeterA & A2000 / 5, lk. 53-54 https://artiklid.elnet.ee/record=b1005204*est

Data analysis for embedded software performance and energy consumption estimationRuberg, Priit; Liiv, Elvar; Lass, Keijo; Ellervee, Peeter2019 IEEE 2nd Ukraine Conference on Electrical and Computer Engineering : UKRCON-2019 : conference proceedings2019 / p. 928-933 : ill https://doi.org/10.1109/UKRCON.2019.8879787

Data type dependent energy consumption estimationRuberg, Priit; Lass, Keijo; Ellervee, Peeter2nd IEEE NORCAS Conference : 1-2 November 2016, Copenhagen, Denmark2016 / [5] p. : ill https://doi.org/10.1109/NORCHIP.2016.7792916

Dependability evaluation in fault-tolerant systems with high-level decision diagramsUbar, Raimund-Johannes; Jervan, Gert; Raik, Jaan; Jenihhin, Maksim; Ellervee, PeeterComputer Science Meets Automation : 10-13 September 2007 : proceedings. Volume II2007 / p. 147-152 : ill https://www.db-thueringen.de/receive/dbt_mods_00008864

Design space exploration and optimisation for NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 117-120 : ill

Design space exploration and optimisation for NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 177-180 : ill

Developing a data acquisition system for measuring microcontroller energy consumption using LabVIEWRuberg, Priit; Lass, Keijo; Ellervee, PeeterBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 123-126 : ill http://www.ester.ee/record=b2150914*est

Digitaali disain - ideest realisatsiooniniEllervee, PeeterA & A2008 / lk. 6-10 : ill https://artiklid.elnet.ee/record=b1021438*est

Digital electronics design and test at Computer Engineering Department of Tallinn University of TechnologyUbar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Ellervee, PeeterThe house magazine : the parlamentary weekly2006 / 1198, p. 42 : ill

Digital hardware organization course for SoC programEllervee, Peeter; Tenhunen, Hannu2001 International Conference on Microelectronic Systems Education : June 17-18, 2001, Las Vegas, Nevada, USA : proceedings2001 / p. 26-27

Digital synthesis tools for education and researchFomina, Jelena; Ellervee, Peeter; Kruus, Margus; Sudnitsõn, Aleksander; Tammemäe, KalleProc. 18th International Conference on Systems for Automation of Engineering and Research (SAER'2004)2004 / p. 160-164

Digital system modeling and synthesis as an introduction to computer systems engineeringTajammul, Muhammad Adeel; Azad, Siavoosh Payandeh; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 52-55 : ill http://dx.doi.org/10.1109/MSE.2015.7160016

DyMeP : an infrastructure to support dynamic memory binding for runtime mapping in CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu; Plosila, Juha28th International Conference on VLSI Design : held concurrently with 14th International Conference on Embedded Systems : 3-7 January 2015, Bangalore, India : proceedings2015 / p. 547-552 : ill http://dx.doi.org/10.1109/VLSID.2015.98

DyMeP : an infrastructure to support dynamic memory binding for runtime mapping in CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu; Plosila, JuhaDoctoral School in Information and Communication Technology : proceedings of doctoral session of BEC 2014 : October 6-8 2014, Laulasmaa2014 / lk. 19-22 : ill

EEG analyzer prototype based on FPGAJenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011) : September 4-6, 2011, Dubrovnik, Croatia : proceedings2011 / p. 101-106 : ill

Embedded software performance estimations at different compiler optimisation levelsRuberg, Priit; Lass, Keijo; Liiv, Elvar; Ellervee, PeeterAdvances in Information, Electronic and Electrical Engineering (AIEEE) : proceedings of the 5th IEEE Workshop, november 24-25, 2017, Riga, Latvia2017 / p. 1-6 : ill https://doi.org/10.1109/AIEEE.2017.8270530

Environment for fault simulation acceleration on FPGAEllervee, Peeter; Raik, Jaan; Tihhomirov, ValentinBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 217-220 : ill

Environment for FPGA-based fault emulationEllervee, Peeter; Raik, Jaan; Tammemäe, Kalle; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering2006 / 3-2, p. 323-335 : ill

Evaluating fault emulation on FPGAEllervee, Peeter; Raik, Jaan; Tihhomirov, Valentin; Tammemäe, KalleField-Programmable Logic and Applications : 14th International Conference, FPL 2004 : Antwerp, Belgium, August 30-September 1, 2004 : proceedings2004 / p. 354-363 : ill

Experience in increase of practical hours for HDL courseReinsalu, Uljana; Ellervee, Peeter2011 International Conference on Microelectronic Systems Education (MSE '11), 5-6 June 2011, San Diego, California2011 / p. 102-105

Exploiting data transfer locality in memory mappingEllervee, Peeter; Miranda, Miguel; Catthoor, Francky; Hemani, Ahmed25th EUROMICRO conference : Informatics : Theory and Practice for the New Millennium : Milan, Italy, September 8-10, 1999 : proceedings. Volume I1999 / p. 14-21 : ill

Fast fault emulation for synchronous sequential circuitsRaik, Jaan; Ellervee, Peeter; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings of East–West Design & Test Workshop (EWDTW’04) : Yalta, Alushta, Crimea, Ukraine, September 23-26, 20042004 / p. 35-40 https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=a6eb712498a5f23db3f95ad66bada257c21e96f0

Fast RTL fault simulation using decision diagrams and bitwise set operationsReinsalu, Uljana; Raik, Jaan; Ubar, Raimund-Johannes; Ellervee, Peeter2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011, Vancouver, Canada2011 / p. 164-170

Fault emulation on FPGA : a feasibility studyEllervee, Peeter; Raik, Jaan; Tihhomirov, ValentinIEEE NORCHIP 2003 : 21 Norchip Conference : Riga, Latvia, 10-11 November 2003 : proceedings2003 / p. 92-95 : ill

Flexible controller for educational robot kitRuberg, Priit; Guitar, Aivar; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 17-20 : ill http://dx.doi.org/10.1109/MSE.2015.7160007

Four years of System-on-Chip curriculaKruus, Margus; Ellervee, PeeterEWME 2006 proceedings : 6th International Workshop on Microelectronics Education : 8-9 June, 2006, Stockholm, Sweden2006 / p. 88-91

FPGA based emulation environmentJervan, Gert; Arhipov, Anton; Ellervee, Peeter2nd International Workshop on Reconfigurable Communication Centric System-on-Chip (ReCoSoC'06)2006

FPGA based fault emulation of synchronous sequential circuitsEllervee, Peeter; Raik, Jaan; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings [of] 22nd NORCHIP Conference : Oslo, Norway, 8-9 November 20042004 / p. 59-62 https://ieeexplore.ieee.org/abstract/document/1423822

FPGA based system for video compression and transmission over bluetoothGorev, Maksim; Ellervee, Peeter53rd IEEE International Midwest Symposium on Circuits and Systems : Seattle, Washington, USA, August 1-4, 2010 : proceedings2010 / p. 367-370 : ill

FPGA-based fault emulation of synchronous sequential circuitsEllervee, Peeter; Raik, Jaan; Tammemäe, Kalle; Ubar, Raimund-JohannesIET computers and digital techniques2007 / 2, p. 70-76 : ill https://ieeexplore.ieee.org/abstract/document/1423822

FPGA-based implementation of EEG analyzerGorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Jenihhin, Maksim; Ellervee, PeeterDATE'11 Friday Workshop on "Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing" : Grenoble, France, March 20112011 / [1] p

Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill http://dx.doi.org/10.1016/j.micpro.2014.11.002

Generalization of network-on-chip communication modellingEllervee, Peeter; Tagel, Mihkel; Jervan, GertWorkshop Digest. Diagnostic Services in Network-on-Chips - Test, Debug, and On-Line Monitoring : DATE 2009 : Nice, France, 20-24 April, 20092009 / ? p

Guest editorialEllervee, Peeter; Nurmi, JariMicroprocessors and microsystems2013 / p. 430-431

Guest editorial : implementation issues in system-on-chipEllervee, Peeter; Nurmi, JariJournal of signal processing systems for signal, image, and video technology2017 / p. 269-270 https://doi.org/10.1007/s11265-017-1242-x

Hardware close programming for freshmenKruus, Helena; Brik, Marina; Kruus, Margus; Ruberg, Priit; Viies, Vladimir; Ellervee, Peeter10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 93-96 : ill

Hardware implementation of face recognition using low precision representationDwivedi, Sai Kumar; Azad, Siavoosh Payandeh; Ellervee, Peeter; Dash, RatnakarBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 63-66 : ill http://www.ester.ee/record=b2150914*est

Hardware/Software co-design in practice : MEMOCODE'08 contest experienceReinsalu, Uljana; Devadze, Sergei; Jutman, Artur; Tšertov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 55-58 : ill

HDL-s for students with different backgroundReinsalu, Uljana; Arhipov, Anton; Evartson, Teet; Ellervee, PeeterProceedings MSE 2007 : 2007 IEEE International Conference on Microelectronic Systems Education : 3-4 June 2007, San Diego, CA2007 / p. 69-70 https://ieeexplore.ieee.org/document/4231454

Hierarchical calculation of malicious faults for evaluating the fault-toleranceUbar, Raimund-Johannes; Devadze, Sergei; Jenihhin, Maksim; Raik, Jaan; Jervan, Gert; Ellervee, PeeterProceedings : Fourth IEEE International Symposium on Electronic Design, Test and Applications : [DELTA 2008] : 23-25 January 2008, Hong Kong, SAR, China2008 / p. 222-227 : ill

High speed data preprocessing for bioimpedance measurements : architectural explorationEllervee, Peeter; Annus, Paul; Min, MartThe 27th NORCHIP Conference : Trondheim, Norway, November 20092009 / [4] p https://ieeexplore.ieee.org/document/5397838

High-Level Decision Diagram manipulations for code coverage analysisMinakova, Karina; Reinsalu, Uljana; Tšepurov, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 207-210 : ill

High-level synthesis of control and memory intensive applications : thesis submitted to the Royal Institute of Technology in partial fulfillment of the requirements for the degree of Doctor of TechnologyEllervee, Peeter2000

High-level synthesis of control and memory intensive communication systemsEllervee, PeeterEighth Annual IEEE International ASIC Conference and Exhibit : proceedings : Stouffer Renaissance Austin Hotel, Austin, Texas, September 18-22, 19951995 / p. 185-191 : ill

How to emulate Network-on-Chip?Ellervee, Peeter; Jervan, GertProceedings of the IEEE East-West Design & Test Workshop (EWDTW'06) : Sochi, Russia, September 15-19, 20062006 / p. 282-286 : ill

IEEE Norchip 2003. a. konverentsEllervee, PeeterA & A2004 / 1, lk. 48-49 https://artiklid.elnet.ee/record=b1015000*est

Implementation of multisine signal generator for a bioimpedance measurement deviceGorev, Maksim; Pesonen, Vadim; Ellervee, PeeterBEC 2012 : 2012 13th Biennial Baltic Electronics Conference : proceedings of the 13th Biennial Baltic Electronics Conference : October 3-5, 2012, Tallinn, Estonia2012 / p. 275-278 : ill

Improved fault emulation for synchronous sequential circuitsRaik, Jaan; Ellervee, Peeter; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings : DSD'2005 : 8th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : Porto, Portugal, August 30 - September 3, 20052005 / p. 72-78 : ill

Improved VHDL input for high-level synthesis tool xTractorEllervee, Peeter; Ivask, Eero; Kruus, MargusBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 87-90 : ill

Innovation and entrepreneurship in the computer systems curricula and Nordic Master School in innovative ICTJervan, Gert; Ellervee, Peeter; Kruus, Margus22nd EAEEIE annual conference : June, 13-15, 2011, Maribor, Slovenija : conference book2011 / p. 9

Introducing computer systems related topics in the first study semesterGorev, Maksim; Pesonen, Vadim; Ellervee, PeeterProceedings of the 8th European Workshop on Microelectronics Education : EWME 2010 : Darmstadt, Germany, 10-12 May 20102010 / p. 185-188 : ill https://www.researchgate.net/publication/228980104_Introducing_Computer_Systems_Related_Topics_in_the_First_Study_Semester

Involving students in teaching process — encouraging student-generated content in ICT studiesKruus, Helena; Ellervee, Peeter; Robal, Tarmo; Ruberg, Priit; Kruus, MargusProceedings of the 24th International Conference on European Association for Education in Electrical and Information Engineering : 30-31 May 2013, Chania, Greece2013 / p. 76-81 : ill

IRSYD : an internal representation for heterogeneous embedded systemsEllervee, PeeterProceedings of NORCHIP'98 Conference, November 9-10, 1998, Lund, Sweden1998 / p. 214-221 : ill

JÄNES : a NAS framework for ML-based EDA applicationsSelg, Hardi; Jenihhin, Maksim; Ellervee, PeeterIEEE International Symposium on Defect and Fault Tolerance in VLSI Systems2021 https://doi.org/10.1109/DFT52944.2021.9568321

Keerukate arvutisüsteemide uurimine Tallinna TehnikaülikoolisJervan, Gert; Ellervee, Peeter; Ubar, Raimund-JohannesTallinna Tehnikaülikooli aastaraamat 20072008 / lk. 42-60 : ill

Kiibiargonaudid, nende kuldvillak ja sümplegaadidTammemäe, Kalle; Ellervee, PeeterInformaatika perspektiivsed suunad : Eesti Teaduste Akadeemia seminari materjalid : 29.11.20002000 / lk. 17-20 : ill

Kuidas mõjutab kiipsüsteem elektroonika-alast kõrgharidust?Ellervee, PeeterA & A2002 / 1, lk. 50-52

Mapping of VHDL structures for generic EDA database format IRSYDIvask, Eero; Ellervee, PeeterThe 7th Biennial Conference on Electronics and Microsystem Technology "Baltic Electronics Conference" : BEC 2000 : October 8 - 11, 2000, Tallinn, Estonia : conference proceedings2000 / p. 317-320 : ill

Microcontroller energy consumption estimation based on software analysis for embedded systemsRuberg, Priit; Lass, Keijo; Ellervee, Peeter2015 Nordic Circuits and Systems Conference (NORCAS) : NORCHIP & International Symposium on System-on-Chip (SoC) : 1st IEEE NORCAS Conference : 26-28 October 2015, Oslo, Norway2015 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2015.7364397

Morphable compression architecture for efficient configuration in CGRAsJafri, Syed Mohammad Asad Hassan; Tajammul, Muhammad Adeel; Ellervee, Peeter2014 17th Euromicro Conference on Digital System Design : DSD 2014 : 27-29 August 2014, Verona, Italy : proceedings2014 / p. 42-49 : ill

Multisine and binary multifrequency waveforms in impedance spectrum measurement : a comparative studyAnnus, Paul; Min, Mart; Ojarand, Jaan; Paavle, Toivo; Land, Raul; Ellervee, Peeter; Parve, Toomas5th European Conference of the International Federation for Medical and Biological Engineering : 14-18 September 2011, Budapest, Hungary2012 / p. 1265-1268 https://link.springer.com/chapter/10.1007/978-3-642-23508-5_327

Multisine signal generation method for a bioimpedance measurement deviceGorev, Maksim; Pesonen, Vadim; Ellervee, PeeterProceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia2012 / p. 111-114 : ill

NESTIMATOR - a neural network based estimatorEllervee, Peeter; Jantsch, Axel; Öberg, Johnny; Hemani, Ahmed7th International Workshop on High-Level Synthesis, Niagara-on-the Lake, Ontario, Canada, May 18-20, 19941994

NESTIMATOR - a neural network based estimatorEllervee, Peeter2nd Baltic Summer School on Information Technology and Systems Engineering, 25-28 July 1994, Nelijärve1994

Neural network based estimator to explore the design space at system levelEllervee, Peeter; Öberg, Johnny; Jantsch, Axel; Hemani, AhmedBEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 21994 / p. 391-396: ill

Open source on-chip logic analyzer for FPGA-sEhrenpreis, Lauri; Ellervee, Peeter; Tammemäe, KalleBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 99-102 : ill

Optimization of multisine excitation for a bioimpedance measurement deviceOjarand, Jaan; Annus, Paul; Min, Mart; Gorev, Maksim; Ellervee, PeeterI2MTC 2014 IEEE International Instrumentation and Measurement Technology Conference : Instrumentation and Measurement for Sustainable Development : Radisson Montevideo Victoria Plaza Hotel & Conference Center, May 12-15, 2014, Montevideo, Uruguay : proceedings2014 / p. 829-832 : ill

Performance estimation of embedded applications on microcontrollersRuberg, Priit; Lass, Keijo; Liiv, Elvar; Ellervee, Peeter2017 IEEE Nordic Circuits and Systems Conference (NORCAS 2017): NORCHIP and International Symposium of System-on-Chip (SoC 2017) : Linkoping, Sweden, 23-25 October, 20172017 / p. 170-175 : ill http://dx.doi.org/10.1109/NORCHIP.2017.8124964

Polymorphic configuration architecture for CGRAsJafri, Syed Mohammad Asad Hassan; Tajammul, Muhammad Adeel; Hermani, Ahmed; Paul, Kolin; Plosila, Juha; Ellervee, Peeter; Tenhunen, HannuIEEE transactions on Very Large Scale Integration (VLSI) Systems2016 / p. 403-407 : ill http://dx.doi.org/10.1109/TVLSI.2015.2402392

Polynomial curve fitting by substitutionGorev, Maksim; Pesonen, Vadim; Ellervee, PeeterFPGAWorld'11 : the 8th Annual FPGAWorld Conference : Copenhagen, Stockholm, Munich, September 12-15, 20112011 / [4] p.: ill

Power-performance trade-offs in second level memory used by an ARM-like Risc architecturePuttaswamy, Kiran; Ellervee, PeeterPower aware computing2002 / ? p. [chapter 11]

Reconfigurable data acquisition unit for bioimpedance measurementsPesonen, Vadim; Gorev, Maksim; Annus, Paul; Min, Mart; Ellervee, PeeterBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 257-260 : ill

Reprogrammable data acquisition unit to reduce aliasing effect in bioimpedance measurementsPesonen, Vadim; Gorev, Maksim; Annus, Paul; Min, Mart; Ellervee, PeeterThe 7th Annual FPGA World Conference, Copenhagen, Denmark, 6 September 20102010 / [6] p.: ill

Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/

Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

Revolver : a high-performance MIMD architecture for collision free computingÖberg, I.; Ellervee, PeeterEuromicro Conference : proceedings : 24th Euromicro Conference : Västerås, Sweden, August 25-27, 1998. Vol. 11998 / p. 301-308

Riistvara kirjelduskeel VerilogEllervee, PeeterA & A1998 / 1, lk. 6-10

SCAAT: Secure cache alternative address table for mitigating cache logical side-channel attacksShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / art, 20035366, p. 213−217 https://doi.org/10.1109/DSD51259.2020.00043

Scheduling framework for dependable NoC-based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertWorkshop Digest. Diagnostic Services in Network-on-Chips - Test, Debug, and On-Line Monitoring : DATE 2009 : Nice, France, 20-24 April, 20092009 / ? p

Scheduling framework for real-time dependable NoC-based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertProceedings of the 11th International Conference on System-on-chip : Tampere, Finland, October 05-07, 20092009 / p. 95-99

Self-testing of pipe-lined signal processing architectures at-speedGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 25-28 : ill

SoC curricula at Tallinn Technical UniversityKruus, Margus; Tammemäe, Kalle; Ellervee, Peeter19th NORCHIP Conference, Kista, Sweden, 12-13 November 2001 : proceedings2001 / p. 99-104 : ill

SoCDep2 : a framework for dependable task deployment on many-core systems under mixed-criticality constraintsAzad, Siavoosh Payandeh; Niazmand, Behrad; Ellervee, Peeter; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2016 11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC) : June 27‐29, 2016, Tallinn, Estonia2016 / [6] p. : ill https://doi.org/10.1109/ReCoSoC.2016.7533903

Software parser and analyser for hardware performance estimationsRuberg, Priit; Meinberg, Erki; Ellervee, Peeter2022 International Conference on Electrical, Computer and Energy Technologies (ICECET), Prague, Czech Republic, 20-22 July 20222022 / p. 1-6 https://doi.org/10.1109/ICECET55527.2022.9872951

Standards-based tools and services for building lifelong learning pathwaysSgouropoulou, C.; Voyiatzis, I.; Koutoumanos, A.; Ellervee, PeeterProceedings of 2017 IEEE Global Engineering Education Conference (EDUCON) : 25-28 April 2017, Athens, Greece2017 / p. 1619-1621 https://doi.org/10.1109/EDUCON.2017.7943065 https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7943065

Surviving the unforeseen - teaching IT and engineering students during COVID-19 outbreakRuberg, Priit; Ellervee, Peeter; Tammemäe, Kalle; Reinsalu, Uljana; Rähni, Andres; Robal, TarmoProceedings - Frontiers in Education Conference, FIE2022 / Code 184790 https://doi.org/10.1109/FIE56618.2022.9962383 Conference Proceedings at Scopus Article at Scopus

System level power-performance trade-offs in embedded systems using voltage and frequency scaling of off-chip buses and memoryPuttaswamy, Kiran; Choi, Kyu-Won; Park, Jun Cheol; Mooney III, Vincent J.; Chatterjee, Abhijit; Ellervee, PeeterISSS'02, October 2-4, 2002, Kyoto, Japan2002 / p. 225-230 : ill

System-level communication synthesis and dependability improvements for Network-on-Chip based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertEstonian journal of engineering2010 / 1, p. 23-38 : ill https://artiklid.elnet.ee/record=b1964968*est

System-level data format exploration for dynamically allocated data structuresEllervee, Peeter; Miranda, Miguel; Catthoor, Francky; Hemani, AhmedIEEE transactions on computer-aided design of integrated circuits and systems2001 / 12, p. 1469-1472 : ill

System-level data format exploration for dynamically allocated data structuresEllervee, Peeter; Miranda, Miguel; Catthoor, Francky; Hemani, Ahmed37th Design Automation Conference : Los Angeles, CA, June 5-9, 2000 : proceedings2000 / p. 556-559 : ill https://ieeexplore.ieee.org/document/855373

System-level design of NoC-based dependable embedded systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertDesign and test technology for dependable systems-on-chip2011 / p. 1-36 : ill

System-level optimization of NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertEstonian journal of engineering2011 / 2, p. 158-168 : ill https://artiklid.elnet.ee/record=b2422982*est

Teaching HDL for IT-studentsEllervee, Peeter; Reinsalu, Uljana; Arhipov, AntonEWME 2006 proceedings : 6th International Workshop on Microelectronics Education : 8-9 June, 2006, Stockholm, Sweden2006 / p. 112-115

Tehismehikesed rallisid miinirajal : [21. nov. TTÜ aulas toimunud robotite võistlusest Robotex 2003 : TTÜ võistkonnad said 2. ja 3. koha : kommenteerib Peeter Ellervee]Ellervee, Peeter; Kaupmees, GretaSL Õhtuleht2003 / 24. nov., lk. 28 : ill

TOP : an algorithm for three-level optimization of PLDsDubrova, E.; Ellervee, Peeter; Miller, D.M.; Muzio, J.C.Design, Automation and Test in Europe : Conference and Exhibition 2000 : Paris, France, March 27-30, 2000 : proceedings2000 / p. 751

Translating behavioral VHDL for emulationEllervee, Peeter; Reinsalu, Uljana; Arhipov, Anton25th IEEE NORCHIP Conference : Aalborg, Denmark, 19-20 November 20072007 / ? p https://ieeexplore.ieee.org/document/4481073

TransMem : a memory architecture to support dynamic remapping and parallelism in low power high performance CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Hemani, Ahmed; Ellervee, Peeter2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation : PATMOS 2016 : September, 21st to 23th 2016, Bremen, Germany : proceedings2016 / p. 92-99 : ill https://doi.org/10.1109/PATMOS.2016.7833431

Using emulation for system model analysisEllervee, Peeter; Arhipov, Anton; Reinsalu, UljanaDATE'07 Friday Workshop on "Diagnostic Service in Network-on-Chips" : Nice, France, 16-20 April 20072007 / p. 280-282

Using soft-core processors and FPGA development boards for hardware emulationArhipov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 155-158 : ill

Using weighted graph coloring heuristics for architecture explorationEllervee, Peeter; Klaar, Tarmo19th NORCHIP Conference, Kista, Sweden, 12-13 November 2001 : proceedings2001 / p. 161-166 : ill

Using weighted graphs for fast architecture explorationEllervee, Peeter; Klaar, Tarmo; Kruus, Margus; Tammemäe, KalleBEC 2002 : proceedings of the 8th Biennial Baltic Electronics Conference : October 6-9, 2002, Tallinn, Estonia2002 / p. 111-114 : ill

Wafer-level die re-test success prediction using machine learningSelg, Hardi; Jenihhin, Maksim; Ellervee, Peeter21st IEEE Latin-American Test Symposium (LATS) 2020 : proceedings2020 / 5 p https://doi.org/10.1109/LATS49555.2020.9093672

Variable byte-length data compression algorithmGorev, Maksim; Ellervee, PeeterBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 353-356 : ill

VHDL front-end for high-level synthesis tool xTractorIvask, Eero; Ellervee, PeeterBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 111-114 : ill

XT taskus : [taskuarvutitest]Ellervee, PeeterArvutustehnika ja Andmetöötlus1990 / 12, lk. 1-2

xTractor : an academic high-level synthesis tool for control and memory intensive applicationsEllervee, PeeterUniversity Booth at Design and Test in Europe : DATE'05 : Munich, Germany, 20052005 / ? p

xTractor: an academic higg-level synthesis tool for control and memory intensive applicationsEllervee, Peeter20th IEEE Conference NORCHIP'2002, Copenhagen, Denmark2002 / p. 253-258

Оптимизация базиса сети при декомпозиции микропрограммных автоматовLeis, Paul; Ellervee, PeeterМетоды синтеза и диагностирования цифровых схем1985 / с. 19-25

Построение контрольной последовательности для управляющих автоматов, реализованных на программируемых логических матрицKaširova, Lilia; Kruus, Margus; Ellervee, PeeterМашинное проектирование электронных устройств и систем1989 / с. 77-88

Электротехника и автоматикаPikkov, Otto; Keevallik, Andres; Lausmaa, Toomas; Sudnitsõn, Aleksander; Leis, Paul; Ellervee, Peeter; Berkman, Boriss; Alango, Villem; Kitsnik, Peeter; Kont, Toomas; Kruus, Margus; Ubar, Raimund-Johannes; Evartson, Teet; Lohuaru, Tõnu; Räisa, O.; Toome, Tõnis; Šendrik, M.G.; Tamm, Boris, inform.1985 https://www.ester.ee/record=b1356648*est

Электротехника и автоматикаMägi, Harri; Velmre, Enn; Pikkov, Mihhail; Orro, S.; Rang, Toomas; Gurjanov, Boris; Kruus, Margus; Salum, Kaja; Berkman, Boriss; Keevallik, Andres; Kasirova, Lilia; Kruus, Margus; Ellervee, Peeter; Ubar, Raimund-Johannes; Grigorjeva, Ksenja; Kont, Toomas1989 https://www.ester.ee/record=b1285446*est