Clock manipulation for heterogeneous emulation environmentEllervee, Peeter; Arhipov, Anton; Tammemäe, KalleProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 213-216 : ill https://ieeexplore.ieee.org/abstract/document/4126984 Comprehensive abstraction of VHDL RTL cores to ESL SystemC = Register-siirde taseme VHDL kirjelduste kompleksne abstraheerimine süsteemitaseme SystemC mudeliteksAbrar, Syed Saif2016 http://www.ester.ee/record=b4564850*est Model synthesis from VHDL for the functional test generation systemKrupnova, Helena1993 https://www.ester.ee/record=b2090509*est On structure of gamesHenno, JaakEJC 2009 : proceedings of the 19th European-Japanese Conference on Information Modelling and Knowledge Bases : Maribor, Slovenia, June 1-5, 20092009 / ? p https://www.researchgate.net/publication/221013911_On_Structure_of_Games Riistvara kirjeldamise keel VHDLTammemäe, KalleArvutustehnika ja Andmetöötlus1992 / 4, lk. 1-11: ill Riistvara kirjeldamiskeel - VHDL : metoodiline materjal1992 https://www.ester.ee/record=b1062926*est Riistvara kirjeldamiskeel - VHDL : metoodiline materjalTammemäe, Kalle2003 http://www.ester.ee/record=b1605950*est Riistvara kirjeldamiskeel VHDL : metoodiline materjalTammemäe, Kalle2002 http://www.ester.ee/record=b1605950*est Riistvara kirjelduskeel VerilogEllervee, PeeterA & A1998 / 1, lk. 6-10 Translating behavioral VHDL for emulationEllervee, Peeter; Reinsalu, Uljana; Arhipov, Anton25th IEEE NORCHIP Conference : Aalborg, Denmark, 19-20 November 20072007 / ? p https://ieeexplore.ieee.org/document/4481073 Язык описания задач УТОПИСТMännisalu, Mati; Tõugu, EnnУправляющие системы и машины : УСиМ : научно-производственный журнал1974 / с. 80-84 : ил https://www.ester.ee/record=b2157161*est