An efficient FPGA-based architecture for contractive autoencodersKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 3 – 6 May 2020, Fayetteville, Arkansas : proceedings2020 / p. 230−230 https://doi.org/10.1109/FCCM48280.2020.00062.

Hierarchical temporal memory implementation on FPGA  using  LFSR based spatial poolerKerner, Madis; Tammemäe, KalleProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 92-95 https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

Novel architectures for contractive autoencoders with embedded learningKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 17th Biennial Baltic electronics conference, Tallinn, Estonia, October 6-8, 2020 : proceedings2020 / 6 p. : ill https://doi.org/10.1109/BEC49624.2020.9277246

Novel Neural Network accelerator architectures for FPGAs = Uudsed närvivõrkude kiirendite arhitektuurid FPGAdeleKerner, Madis2024 https://www.ester.ee/record=b5675484*est https://digikogu.taltech.ee/et/Item/3568fe35-19c3-43e6-9525-73c79371ab13 https://doi.org/10.23658/taltech.16/2024

Triple fixed-point MAC unit for deep learningKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, ThomasProceedings of the 2021 Design, Automation & Test in Europe (DATE 2021), 1-5 February 2021 : Virtual Conference2021 / p. 1404-1407 https://doi.org/10.23919/DATE51398.2021.9474020