A framework of awareness for artificial subjectsJantsch, Axel; Tammemäe, KalleCODES '14 : proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis2014 / [3] p A new measure for calculating multiple fault coverage of microprocessor self-testOyeniran, Adeboye Stephen; Odozi, Uzochukwu Eddie; Ubar, Raimund-JohannesBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 75-78 : ill http://www.ester.ee/record=b2150914*est A proposal for optimisation of low-powered FSM testingBrik, Marina; Fomina, Jelena; Ubar, Raimund-JohannesProceedings of IEEE East-West Design & Test Workshop (EWDTW'05) : Odessa, Ukraine, September 15-19, 20052005 / p. 15-20 A study on effective knowledge reuse in multi-platform web applications user interfacesMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoPICMET '15 Conference : Management of the Technology Age : August 2-6, 2015, Portland, Oregon, USA : conference bulletin2015 / p. 68 A study on user click behaviour for WIS user interface improvementsMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoDatabases and information systems VIII : selected papers from the Eleventh International Baltic Conference, DB&IS 20142014 / p. 173-186 : ill A synthesis-agnostic behavioral fault model for high gate-level fault coverageKarputkin, Anton; Raik, JaanProceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 14-18 March 2016, ICC, Dresden, Germany2016 / p. 1124-1127 : ill https://ieeexplore.ieee.org/document/7459477/figures#figures A system for teaching basic and advanced topics of IEEE 1149.1 boundary scan standard (extended abstract)Jutman, Artur; Rosin, Vjatšeslav; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichProceedings of 16th EAEEIE Conference on Innovation in Education for Electrical and Information Engineering (EIE) : Lappeenranta, Finland, 6th-8th June 20052005 / [2] p. : ill A tool for random test generation targeting high diagnostic resolutionOsimiry, Emmanuel Ovie; Kostin, Sergei; Raik, Jaan; Ubar, Raimund-JohannesBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 79-82 : ill http://www.ester.ee/record=b2150914*est A tool set for teaching design-for-testability of digital circuitsKostin, Sergei; Orasson, Elmet; Ubar, Raimund-JohannesEWME 2016 : 11th European Workshop on Microelectronics Education : May 11-13, 2016, Southampton, UK2016 / [6] p. : ill http://dx.doi.org/10.1109/EWME.2016.7496466 Aastad, mis möödusid linnulennulUbar, Raimund-JohannesRaimund-Johannes Ubar. Bibliograafia2016 / lk. 13-44 : ill., fot Abstraction of clock interface for conversion of RTL VHDL to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, Jaan2014 IEEE International Advance Computing Conference (IACC) : February 21-22, 2014, Gurgaon, India2014 / p. 50-55 : ill Accurate dialysis dose evaluation and extrapolation algorithms during online optical dialysis monitoringFridolin, Ivo; Karai, Deniss; Kostin, Sergei; Ubar, Raimund-JohannesIEEE transactions on biomedical engineering2013 / p. 1371-1377 : ill Accurate NBTI-induced gate delay modeling based on intensive SPICE simulationsKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, MaksimMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 21-26 : ill Activity classification for real-time wearable systems : effect of window length, sampling frequency and number of features on classifier performanceAllik, Ardo; Pilt, Kristjan; Karai, Deniss; Fridolin, Ivo; Leier, Mairo; Jervan, Gert2016 IEEE EMBS Conference on Biomedical Engineering and Sciences (IECBES) : Kuala Lumpur, 4-8 December 20162016 / p. 460-464 : ill https://doi.org/10.1109/IECBES.2016.7843493 Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill Advanced technical education in the age of cyber physical systemsVierhaus, Heinrich Theodor; Schölzel, Mario; Raik, Jaan; Ubar, Raimund-Johannes10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 193-198 : ill Advances in Databases and Information Systems : proceedings of the 9th East-European Conference, ADBIS 2005 : Tallinn, September 12-15, 20052005 https://www.ester.ee/record=b2068111*est Akadeemilisest vabadusest ja riisiterastUbar, Raimund-JohannesTallinna Tehnikaülikooli aastaraamat 20132014 / lk. 11-21 An ad-hoc implementation of a remote laboratoryAzad, Siavoosh Payandeh; Kinks, Hannes; Tajammul, Muhammad Adeel; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 48-51 : ill http://dx.doi.org/10.1109/MSE.2015.7160015 An external test approach for network-on-a-chip switchesRaik, Jaan; Govind, Vineeth; Ubar, Raimund-JohannesATS '06 : Proceedings of the 15th Asian Test Symposium : November 20-23, 2006, Fukuoka, Japan2006 / p. 437-442 : ill http://dx.doi.org/10.1109/ATS.2006.23 Analysis and comparison of attainable hardware acceleration in all programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 345-352 : ill http://dx.doi.org/10.1109/DSD.2015.45 Applets for learning digital design and test [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Kruus, Margus; Wuttke, Heinz-Dietrich1st International Conference on Interactive Mobile and Computer Aided Learning (IMCL2006) : Amman, Jordan, April 19-21, 20062006 / p. 1-4 : ill. [CD-ROM] Application of extensible processing platforms for experiments with FPGA-based circuitsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, AleksanderMELECON 2014 : 2014 17th IEEE Mediterranean Electrotechnical Conference : 13-16 April 2014, Beirut, Lebanon2014 / p. 467-471 : ill Application of sequential test set compaction to LFSR reseedingAleksejev, Igor; Jutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes26th Norchip Conference : Tallinn, Estonia, 17-18 November 2008 : formal proceedings2008 / p. 102-107 : ill http://dx.doi.org/10.1109/NORCHP.2008.4738292 Applying user domain model to improve Web recommendationsRobal, Tarmo; Kalja, AhtoDatabases and information systems VII : selected papers from the tenth International Baltic Conference, DB&IS 20122013 / p. 118-131 APRICOT : a framework for teaching digital systems verificationRaik, Jaan; Jenihhin, Maksim; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-Johannes19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 172-177 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610181 ArvutipõlvkonnadToomsalu, Arvo2004 http://www.ester.ee/record=b1881924*est Arvutitehnika riistvara : õpik kõrgkoolideleEvartson, Teet2013 https://www.ester.ee/record=b2967116*est Assessment of diagnostic test for automated bug localizationTihhomirov, Valentin; Tšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATW2013 : 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013 : [proceedings]2013 / [6] p. : ill Assessment of student's design results in e-learning-scenarios [Electronic resource]Wuttke, Heinz-Dietrich; Ubar, Raimund-Johannes; Henke, Karsten; Jutman, Artur8th International Conference on Technology Based Higher Education and Training : 10th to 13th July, 2007, KKR Hotel Kumamoto, Kumamoto, Japan : [proceedings]2007 / [6] p. [CD-ROM] Asutajadekaanid : eesmärk on anda inimestele võimalus oma tööd paremini tehaOorn, Arvo; Jervan, Gert; Kanger, Tõnis; Listra, EnnMente et Manu2016 / lk. 18-23 : fot http://www.ttu.ee/public/u/ulikool/Tutvustus/ajaleht-mente-et-manu/MM_2016_05/index.html Asynchronous fault detection in IEEE P1687 instrument networkShibin, Konstantin; Devadze, Sergei; Jutman, ArturIEEE 23rd North Atlantic Test Workshop : 14-16 May 2014, Binghampton, New York : proceedings2014 / p. 73-78 : ill At-speed functional built-in self-test methodology for processors [Electronic resource]Ubar, Raimund-Johannes; Indus, Viljar; Kalmend, OliverProceedings of the IASTED International Conference on Engineering and Applied Science : December 27-29, 2012, Columbo, Sri Lanka2012 / p. 168-172 : ill [CD-ROM] At-speed self-testing of high-performance pipe-lined processing architectures [Electronic resource]Gorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, Mart31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / p. 1-6 : ill [USB] At-speed testing and test quality evaluation for high-performance pipelined systems Töökiirusel testimine ja testi kvaliteedi hindamine kõrgjõudlus-konveierarhitektuuriga süsteemideleGorev, Maksim2015 https://digi.lib.ttu.ee/i/?3953 At-speed testing of inter-die connections of 3D-SICs in the presence of shore logicShibin, Konstantin; Chickermane, Vivek; Keller, Brion; Papameletis, Christos; Marinissen, Erik Jan2015 Asian Test Symposium : ATS 2015 : 22-25 November 2015, Mumbai, Maharashtra, India : proceedings2015 / p. 79-84 : ill http://dx.doi.org/10.1109/ATS.2015.21 Aukartus teaduse eesUbar, Raimund-JohannesRaimund-Johannes Ubar. Bibliograafia2016 / lk. 47-56 Aukartus teaduse ees : [essee]. Nikolai Alumäe medalUbar, Raimund-JohannesSirp2014 / lk. 3-5 : fot https://www.sirp.ee/s1-artiklid/c21-teadus/aukartus-teaduse-ees/ Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill Automated design error localization in RTL designsJenihhin, Maksim; Tšepurov, Anton; Tihhomirov, Valentin; Raik, Jaan; Hantson, Hanno; Ubar, Raimund-Johannes; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-DietrichIEEE design & test of computers2014 / p. 83-92 : ill http://dx.doi.org/10.1109/MDAT.2013.2271420 Automated minimization of concurrent online checkers for network-on-chipsSaltarelli, Pietro; Niazmand, Behrad; Hariharan, Ranganathan; Raik, Jaan; Jervan, Gert; Hollstein, Thomas10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC 2015) : Bremen, 29 June - 1 July 20152015 / [8] p. : ill http://dx.doi.org/10.1109/ReCoSoC.2015.7238079 Automatic distribution of local testers for testing distributed systemsVain, Jüri; Halling, Evelin; Kanter, Gert; Anier, Aivo; Pal, DeepakDatabases and information systems IX : selected papers from the twelfth International Baltic Conference, DB&IS 20162016 / p. 297-310 : ill http://dx.doi.org/10.3233/978-1-61499-714-6-297 BASTION - board and SoC test instrumentation for Ageing and No Failure FoundDevadze, SergeiMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 77 BIST analyzer : a training platform for SoC testing [Electronic resource]Jutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich37th Annual Frontiers in Education Conference : Global Engineering : Knowledge Without Borders, Opportunities Without Passports : Milwaukee, Wisconsin, October 10-13, 20072007 / p. S3H-8-S3H-13 : ill. [CD-ROM] http://dx.doi.org/10.1109/FIE.2007.4418125 Boolean fault dignosis with structurally synthesized BDDsUbar, Raimund-JohannesRecent progress in the Boolean domain2014 / p. 303-331 : ill Bringing research issues into lab scenarios on the example of SoC testing [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei; Wuttke, Heinz-DietrichInternational Conference on Engineering Education - ICEE 2007 : September 3-7, 2007, Coimbra, Portugal2007 / [7] p. : ill. [CD-ROM] http://icee2007.dei.uc.pt/proceedings/papers/429.pdf Clock manipulation for heterogeneous emulation environmentEllervee, Peeter; Arhipov, Anton; Tammemäe, KalleProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 213-216 : ill https://ieeexplore.ieee.org/abstract/document/4126984 CMS drift tubes sector collector relocation phase 1 upgrade [Electronic resource]Bedoya, C. F.; Jutman, Artur; Shibin, Konstantin; Devadze, Sergei2015 http://cms.cern.ch/iCMS/jsp/openfile.jsp?type=DN&year=2015&files=DN2015_011.pdf Code compaction within CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, PeeterProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 133-136 : ill Code coverage analysis for concurrent programming languages using high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-JohannesProceedings of the 12th European Workshop on Dependable Computing : EWDC 2009 : Toulouse, France, May 14-15, 20092009 / [4] p. : ill https://hal.archives-ouvertes.fr/hal-00381559 Combinational fault simulation in sequential circuitsUbar, Raimund-Johannes; Kõusaar, Jaak; Gorev, Maksim; Devadze, Sergei2015 IEEE International Symposium on Circuits and Systems : 24-27 May 2015, Lisboa, Portugal : [proceedings]2015 / p. 2876-2879 : ill Combinatorial algorithms of discrete mathematicsZakrevskij, Arkadij; Pottosin, Yu.; Cheremisinova, L.2008 http://www.ester.ee/record=b2350865*est Comparison of plan-driven and agile project management approaches : theoretical bases for a case study in Estonian software industryLepmets, Marion; Nael, MargusDatabases and Information Systems VI : selected papers from the Ninth International Baltic Conference, DB&IS 20102011 / p. 296-308 : ill Comparison of two approaches to improve functional BIST fault coverageKostin, Sergei; Ubar, Raimund-Johannes; Gorev, Maksim; Mägi, GunnarBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 105-108 : ill Complementing ICT studies with learning objects on domain ontologiesRobal, Tarmo; Kruus, Helena; Kalja, AhtoProceedings of the 24th International Conference on European Association for Education in Electrical and Information Engineering : 30-31 May 2013, Chania, Greece2013 / p. 92-96 : ill Complex delay fault reasoning with sequential 7-valued algebraKõusaar, Jaak; Ubar, Raimund-Johannes; Aleksejev, Igor2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102403 Comprehensive abstraction of VHDL RTL cores to ESL SystemC = Register-siirde taseme VHDL kirjelduste kompleksne abstraheerimine süsteemitaseme SystemC mudeliteksAbrar, Syed Saif2016 http://www.ester.ee/record=b4564850*est Computing sorted subsets for data processing in communicating software/hardware control systemsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderInternational journal of computers communications & control2016 / p. 126-141 : ill http://dx.doi.org/10.15837/ijccc.2016.1.1442 Constraints solving based hierarchical test generation for synchronous sequential circuits = Kitsenduste lahendamisel baseeruv hierarhiline testigenereerimine sünkroonsetele järjestikskeemideleViilukas, Taavi2012 https://www.ester.ee/record=b2888278*est Construction of the tests of combinational circuit failures by analyzing the orthogonal disjunctive normal forms represented by the alternative graphsMatrosova, A.Yu.; Pleshkov, A.G.; Ubar, Raimund-JohannesAutomation and remote control2005 / p. 313-327 : ill http://dx.doi.org/10.1007/s10513-005-0054-9 Control intensive digital system synthesisTammemäe, Kalle1997 http://www.ester.ee/record=b1060033*est Critical path tracing based simulation of transition delay faultsKõusaar, Jaak; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, JaanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 61-66 : ill Critical path tracing based simulation of transition delay faultsKõusaar, Jaak; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan2014 17th Euromicro Conference on Digital System Design : DSD 2014 : 27-29 August 2014, Verona, Italy : proceedings2014 / p. 108-113 : ill Customizable compression architecture for efficient configuration in CGRAsJafri, Syed Mohammad Asad Hassan; Ellervee, Peeter2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines : FCCM 2014 : 11-13 May 2014, Boston, Massachusetts, USA : proceedings2014 / p. 31 : ill Customization methodology of a Coarse Grained Reconfigurable ArchitectureAzad, Siavoosh Payandeh; Farahini, Nasim; Hemani, AhmedNorchip : 32nd NORCHIP Conference, 27-28 October 2014, Tampere, Finland2014 / [4] p. : ill Data type dependent energy consumption estimationRuberg, Priit; Lass, Keijo; Ellervee, Peeter2nd IEEE NORCAS Conference : 1-2 November 2016, Copenhagen, Denmark2016 / [5] p. : ill https://doi.org/10.1109/NORCHIP.2016.7792916 Databases and Information Systems : proceedings of the 11th International Baltic Conference, Baltic DB&IS 2014 : Tallinn, Estonia, 8-11 June, 20142014 http://www.ester.ee/record=b3088507*est Databases and information systems : proceedings of the Eighth International Baltic Conference, Baltic DBAMPIS 2008 : Tallinn, June 2-5, 20082008 http://www.ester.ee/record=b2374996*est Databases and information systems : proceedings of the Fifth International Baltic Conference : Baltic DB & IS 2002 : Tallinn, June 3-6, 20022002 http://www.ester.ee/record=b1641978*est Databases and information systems VIII : selected papers from the Eleventh International Baltic Conference, DB&IS 20142014 https://www.ester.ee/record=b4447206*est Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologiesYing, Haoyuan; Jaiswal, Ashok; Hollstein, Thomas; Hofmann, KlausJournal of systems architecture2013 / p. 528-542 : ill Decision diagrams - from a mathematical notion to engineering applicationsStankovic, Radomir S.; Ubar, Raimund-Johannes; Astola, JaakkoFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 281-301 : ill http://dx.doi.org/10.2298/FUEE1103281S Decision diagrams for diagnostic modelingUbar, Raimund-JohannesMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 43 DefSim - the defective ICPleskacz, Witold A.; Jutman, Artur; Ubar, Raimund-Johannes; Devadze, SergeiDATE 2007 : Design Automation and Test in Europe : Nice, France, April 16-20, 20072007 / p. s96 (2 p.) Department of Computer EngineeringKeevallik, Andres; Ubar, Raimund-JohannesResearch activities / Tallinn Technical University1993 / p. 75-78 https://www.ester.ee/record=b1053754*est Dependable embedded systems : FP7 KhAI-ERA project experienceKharchenko, Vyacheslav; Kulanov, Vitaliy; Jervan, Gert10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 26-30 : ill Design of FPGA-based circuits using hierarchical finite state machinesSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander2012 http://www.ester.ee/record=b2857138*est Design space exploration in multi-level computing systemsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderCompSysTech'14 : 15th International Conference on Computer Systems and Technologies : Ruse, Bulgaria, June 27-28, 20142014 / p. 40-47 : ill Designing reliable cyber-physical systems : overview associated to the special session at FDL'16Aleksandrowicz, Gadi; Arbel, Eli; Bloem, Roderick; Devadze, Sergei; Jenihhin, Maksim; Jutman, Artur; Raik, Jaan; Shibin, KonstantinThe 2016 Forum on Specification & Design Languages : proceedings : Bremen, Germany, September 14-16, 20162016 / [8] p. : ill https://doi.org/10.1109/FDL.2016.7880382 Developing a data acquisition system for measuring microcontroller energy consumption using LabVIEWRuberg, Priit; Lass, Keijo; Ellervee, PeeterBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 123-126 : ill http://www.ester.ee/record=b2150914*est DfT-based external test and diagnosis of mesh-like networks on chips = Testitavusel põhinev välise testi ja diagnoosi meetod kahemõõtmelistele kiipvõrkudeleGovind, Vineeth2009 https://digi.lib.ttu.ee/i/?454 https://www.ester.ee/record=b2539211*est Diagnostic modeling of digital systems with low- and high-level decision diagramsUbar, Raimund-JohannesLATW2013 : 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013 : [proceedings]2013 / [1] p Diagnostic test generation for statistical bug localization using evolutionary computationGaudesi, Marco; Jenihhin, Maksim; Raik, Jaan; Tihhomirov, Valentin; Ubar, Raimund-JohannesApplications of Evolutionary Computation : 17th European Conference, EvoApplications 2014, Granada, Spain, April 23-25, 2014 : revised selected papers2014 / p. 425-436 : ill DIAGNOZER : a laboratory tool for teaching research in diagnosis of electronic systems [Electronic resource]Ubar, Raimund-Johannes; Kostin, Sergei; Jutman, Artur; Raik, Jaan; Wuttke, Heinz-Dietrich2009 IEEE International Conference on Microelectronic Systems Education MSE '09 : 25-27 July 2009, San Francisco, California : [proceedings]2009 / p. 12-15 : ill. [CD-ROM] http://dx.doi.org/10.1109/MSE.2009.5270842 Digitaalsüsteemide diagnostikaUbar, Raimund-Johannes2005 http://www.ester.ee/record=b2097071*est Digital system modeling and synthesis as an introduction to computer systems engineeringTajammul, Muhammad Adeel; Azad, Siavoosh Payandeh; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 52-55 : ill http://dx.doi.org/10.1109/MSE.2015.7160016 Digital test in WEB-based environmentIvask, Eero2006 https://www.ester.ee/record=b2158119*est Discovering logical constructs from Estonian children language = Loogiliste konstruktsioonide avastamine eesti laste keelestMatsak, Erika2009 https://www.ester.ee/record=b2557755*est Diskreetne matemaatikaLensen, Harri; Kruus, Margus2006 http://www.ester.ee/record=b2223858*est Diskreetne matemaatikaLensen, Harri; Kruus, Margus2002 http://www.ester.ee/record=b1850141*est Distributed approach for parallel exact critical path tracing fault simulationIvask, Eero; Devadze, Sergei; Ubar, Raimund-JohannesInternational journal of microelectronics and computer science2010 / p. 165-174 : ill Double phase fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Josifovska, Galina; Oyeniran, Adeboye StephenDSD 2015 : 18th Euromicro Conference on Digital Systems Design : 26-28 August 2015, Funchal, Madeira, Portugal2015 / p. 700-705 : ill DyMeP : an infrastructure to support dynamic memory binding for runtime mapping in CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu; Plosila, JuhaDoctoral School in Information and Communication Technology : proceedings of doctoral session of BEC 2014 : October 6-8 2014, Laulasmaa2014 / lk. 19-22 : ill DyMeP : an infrastructure to support dynamic memory binding for runtime mapping in CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu; Plosila, Juha28th International Conference on VLSI Design : held concurrently with 14th International Conference on Embedded Systems : 3-7 January 2015, Bangalore, India : proceedings2015 / p. 547-552 : ill http://dx.doi.org/10.1109/VLSID.2015.98 Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-dimensional network-on-chipsYing, Haoyuan; Hofmann, Klaus; Hollstein, ThomasProceedings of the 2014 International Conference on High Performance Computing & Simulation (HPCS 2014) : July 21-25, 2014, Bologna, Italy2014 / p. 516-522 : ill EE : Eesti (Estonia)Ubar, Raimund-Johannes; Rüstern, Ennu; Kruus, MargusTowards the harmonisation of Electrical and Information Engineering Education in Europe : 2003-20042003 / p. 67-74 : ill http://www.ester.ee/record=b2300874*est Eestilt Euroopale : [Euroopa nanotehnika foorumil osales Eestist Raamprogrammi FP7 projekt DIAMOND, mida juhib TTÜ arvutitehnika instituudi professor Jaan Raik]Ubar, Raimund-JohannesMente et Manu2012 / lk. 8 : fot https://www.ester.ee/record=b1242496*est Effective scalable IEEE 1687 instrumentation network for fault managementJutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE design & test2013 / p. 26-35 : ill E-learning tools for teaching self-test of digital electronicsJutman, Artur; Gramatova, Elena; Pikula, T.; Ubar, Raimund-Johannes15 EAEEIE International Conference on Innovation in Education for Electrical and Information Engineering : Sofia, Bulgaria, May 27-29, 20042004 / p. 267-272 : ill Elektroonika kui Eesti innovatsioonisüsteemi infrastruktuurMin, Mart; Rang, Toomas; Ubar, Raimund-JohannesEesti teadlaste kongress, 11.-15. augustini 1996. a. Tallinnas : ettekannete kokkuvõtted1996 / lk. 265 https://www.ester.ee/record=b1052731*est Elmet Orasson tabab laskesportiOrasson, ElmetMente et Manu2014 / lk. 18-19 : fot https://www.ester.ee/record=b1242496*est Embedded software solutions for development of marine navigation light system = Sardtarkvara lahendused valgusnavigatsiooni süsteemide arenduselMoorits, Erkki2016 http://digi.lib.ttu.ee/i/?6383 Environment for the analysis of functional self-test quality in digital systemsUbar, Raimund-Johannes; Kostin, Sergei; Kruus, Helena; Aarna, Margit; Devadze, SergeiProceedings of the Estonian Academy of Sciences2014 / p. 151-162 : ill https://artiklid.elnet.ee/record=b2673964*est Estonia : e-Design and EDAJenihhin, Maksim50th DAC Global Forum2013 / [2] p Estonian eGovernment services : lesson learnedKalja, Ahto; Põld, Janari; Robal, Tarmo; Vallner, Uuno; Viies, VladimirProceedings of PICMET'13 : Technology Management in the IT-Driven Services : [July 28-August 1, 2013, San Jose, California, USA]2013 / p. 562-568 : ill Evaluation of basic project management activities : study in software industryLepmets, Marion2007 https://www.ester.ee/record=b2302044*est Evaluation of SysML software for teaching systems engineering basicsKruus, Helena; Jervan, GertProceedings of the 25th International Conference on European Association for Education in Electrical and Information Engineering : 30 May-June 2014, Cesme, Türkiye2014 / p. 29-32 : ill Expectations of software development practitioners for non-technical clientsOjastu, Deniss; Robal, Tarmo; Kalja, AhtoDatabases and information systems VIII : selected papers from the Eleventh International Baltic Conference, DB&IS 20142014 / p. 317-330 : ill Extended checkers for control part of routers in network-on-chipsHariharan, Ranganathan; Niazmand, Behrad; Hollstein, Thomas; Raik, Jaan; Jervan, GertMEDIAN 2015 : the 4th Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : March 13, 2015, Grenoble, France2015 / p. 36-39 : ill Extended checkers for logic-based distributed routing in network-on-chipsNiazmand, Behrad; Hariharan, Ranganathan; Govind, Vineeth; Jervan, Gert; Hollstein, Thomas; Raik, JaanBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 77-80 : ill Extended checkers for logic-based distributed routing in network-on-chipsNiazmand, Behrad; Hariharan, Ranganathan; Govind, Vineeth; Jervan, Gert; Hollstein, Thomas; Raik, JaanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 83-86 : ill Extensible open-source framework for translating RTL VHDL IP cores to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanProceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 8-10, 2013, Karlovy Vary, Czech Republic2013 / p. 112-115 Fast and optimized task allocation method for low vertical link density 3-Dimensional Networks-on-Chip based many core systemsYing, Haoyuan; Hollstein, Thomas; Hofmann, KlausProceedings : Design, Automation & Test in Europe : Grenoble, France, March 18-22, 20132013 / p. 1777-1782 : ill Fast data sort based on searching networks with ring pipelineSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2016 / p. 58-62 : ill http://dx.doi.org/10.5755/j01.eie.22.4.15920 Fast extended test access via JTAG and FPGAsDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-JohannesInternational Test Conference 2009 : November 1 - November 6, 2009, Austin Convention Center, Austin, Texas USA : proceedings2009 / p. 1-7 : ill http://dx.doi.org/10.1109/TEST.2009.5355668 Fast matrix covering in all programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2014 / p. 150-153 : ill Fast static compaction of tests composed of independent sequences : basic properties and comparison of methodsRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesThe 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume II2002 / p. 445-448 : ill http://dx.doi.org/10.1109/ICECS.2002.1046190 https://ieeexplore.ieee.org/document/1046190 Fault collapsing in digital circuits using fast fault dominance and equivalence analysis with SSBDDsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, JaanVLSI-SoC : Design for Reliability, Security, and Low Power : 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015 Daejeon, Korea, October 5-7, 2015 : revised selected papers2016 / p. 23-45 : ill http://dx.doi.org/10.1007/978-3-319-46097-0_2 Fault diagnosis in integrated circuits with BISTUbar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan; Evartson, Teet; Lensen, Harri10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 604-610 : ill http://dx.doi.org/10.1109/DSD.2007.4341530 Fault effect reasoning in digital systems by topological view on low- and high-level decision diagramsUbar, Raimund-JohannesВестник Томского государственного университета. Управление, вычислительная техника и информатика2014 / p. 99-113 : ill http://journals.tsu.ru/informatics/&journal_page=archive&id=923&article_id=12107 Fault management instrumentation network based on IEEE P1687 IJTAGShibin, Konstantin; Jutman, Artur; Devadze, SergeiEuropean Test Symposium (ETS), 2013, Avignon, France2013 Fault simulation and code coverage analysis of RTL designs using high-level decision diagrams = Rikete simuleerimine ja koodikatte analüüs register-siirde tasemel kasutades kõrgtaseme otsustusdiagrammeReinsalu, Uljana2013 https://www.ester.ee/record=b2963595*est Fault simulation of digital systems = Digitaalsüsteemide rikete simuleerimineDevadze, Sergei2009 https://digi.lib.ttu.ee/i/?445 https://www.ester.ee/record=b2508727*est Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDsDevadze, Sergei; Raik, Jaan; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 97-102 : ill Fault simulation with parallel exact critical path tracing in multiple core environmentGorev, Maksim; Ubar, Raimund-Johannes; Devadze, SergeiProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 9-13 March 2015, Grenoble, France2015 / p. 1180-1185 : ill Fault-tolerant scheduling of mixed-critical applications on multi-processor platformsBagheri, Mehrdad; Jervan, Gert2014 International Conference on Embedded and Ubiquitous Computing : EUC 2014 : 26-28 August 2014, Milano, Italy : proceedings2014 / p. 25-32 : ill Flexible controller for educational robot kitRuberg, Priit; Guitar, Aivar; Ellervee, Peeter2015 International Conference on Microelectronic Systems Education : MSE '15 : Pittsburgh, PA, May 20-21, 20152015 / p. 17-20 : ill http://dx.doi.org/10.1109/MSE.2015.7160007 Foreword to the 12th IEEE DDECS SymposiumPliva, Zdenek; Manhaeve, Hans; Renovell, Michel; Novak, Ondrej; Ubar, Raimund-Johannes; Drabkova, JindraProceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 15-17, 2009, Liberec, Czech Republic2009 / p. iii http://dx.doi.org/10.1109/DDECS.2009.5012081 Formal verification and error correction on high-level decision diagrams = Formaalne verifitseerimine ja vigade parandamine kõrgtasemelistel otsustusdiagrammidelKarputkin, Anton2012 FP7 DIAMOND : design error diagnosis and correction success storiesRaik, Jaan; Jenihhin, Maksim; Könighofer, RobertEuropean Test Symposium (ETS), 2013, Avignon, France2013 / p. 1-6 FPGA-based accelerators for parallel data sortSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderApplied computer systems2014 / p. 53-63 : ill FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est FPGA-based time and cost effective Hamming weight comparators for binary vectorsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, MargusProceedings : EUROCON 2015 : Salamanca, Spain, 8th-11th September2015 / p. 328-333 : ill http://dx.doi.org/10.1109/EUROCON.2015.7313700 A framework for area-efficient concurrent online checkers designSaltarelli, Pietro; Niazmand, Behrad; Hariharan, Ranganathan; Raik, Jaan; Jervan, Gert; Hollstein, ThomasMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 64-69 : ill A framework for combining concurrent checking and online embedded test for low-latency fault detection in NoC routersSaltarelli, Pietro; Niazmand, Behrad; Raik, Jaan; Govind, Vineeth; Hollstein, Thomas; Jervan, Gert; Hariharan, RanganathanNOCS '15 : International Symposium on Networks-on-Chip : Vancouver, BC, Canada, September 28-30, 20152015 / [8] p. : ill http://dx.doi.org/10.1145/2786572.2788713 A framework for comprehensive automated evaluation of concurrent online checkersSaltarelli, Pietro; Niazmand, Behrad; Raik, Jaan; Hariharan, Ranganathan; Jervan, Gert; Hollstein, ThomasEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 288-292 : ill http://dx.doi.org/10.1109/DSD.2015.15 A framework for improving web application user interfaces through immediate evaluationMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoDatabases and information systems IX : selected papers from the twelfth International Baltic Conference, DB&IS 20162016 / p. 283-296 : ill https://doi.org/10.3233/978-1-61499-714-6-283 FSMD RTL design manipulation for clock interface abstractionAbrar, Syed Saif; Jenihhin, Maksim; Raik, Jaan2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 10-13 August 2015, Kerala, India2015 / p. 463-468 : ill http://dx.doi.org/10.1109/ICACCI.2015.7275652 Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill http://dx.doi.org/10.1016/j.micpro.2014.11.002 GA-based test generation for sequential circuitsBrik, Marina; Raik, Jaan; Ubar, Raimund-Johannes; Ivask, EeroProceedings of East–West Design & Test Workshop (EWDTW’04) : Yalta, Alushta, Crimea, Ukraine, September 23-26, 20042004 / p. 30-34 Gate-level modelling of NBTI-induced delays under process variationsCopetti, Thiago; Cardoso Medeiros, Guilherme; Bolzani Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 75-80 : ill http://dx.doi.org/10.1109/LATW.2016.7483343 Grey box identification of fractional-order system models from frequency domain dataTepljakov, Aleksei; Petlenkov, Eduard; Belikov, Juri41th International Conference on Telecommunications and Signal Processing : July 4-6, 2018, Athens, Greece : proceedings2018 / p. 319-322 : ill https://doi.org/10.1109/TSP.2018.8441247 GSNoC — the comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systemsYing, Haoyuan; Hollstein, Thomas; Hofmann, KlausProceedings of the 2013 International Conference on High Performance Computing & Simulation (HPCS 2013) : July 1-July 5, 2013, Helsinki, Finland2013 / p. 217-223 : ill Guest editorialEllervee, Peeter; Nurmi, JariMicroprocessors and microsystems2013 / p. 430-431 Hardware accelerators for information retrieval and data miningSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, Aleksander; Rjabov, Artjom2015 International Conference on Information and Communication Technology Research (ICTRC2015) : Abu Dhabi, United Arab Emirates, May 17-19, 20152015 / p. 202-205 : ill http://dx.doi.org/10.1109/ICTRC.2015.7156457 Hardware close programming for freshmenKruus, Helena; Brik, Marina; Kruus, Margus; Ruberg, Priit; Viies, Vladimir; Ellervee, Peeter10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 93-96 : ill Hardware implementation of face recognition using low precision representationDwivedi, Sai Kumar; Azad, Siavoosh Payandeh; Ellervee, Peeter; Dash, RatnakarBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 63-66 : ill http://www.ester.ee/record=b2150914*est Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleidMihhailov, Dmitri2011 https://www.ester.ee/record=b2748823*est Hardware modeling for design verification and debug = Riistvara modelleerimine disaini verifitseerimise ja silumise jaoksTšepurov, Anton2013 https://www.ester.ee/record=b2963501*est Hardware/software co-design for programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, Aleksander; Cardoso, Cláudia2014 http://www.ester.ee/record=b3087107*est Hardware/software co-design in extensible processing platforms for combinatorial search algorithmsSkliarova, Iouliia; Sklyarov, Valery; Rjabov, Artjom; Sudnitsõn, AleksanderMELECON 2014 : 2014 17th IEEE Mediterranean Electrotechnical Conference : 13-16 April 2014, Beirut, Lebanon2014 / p. 462-466 : ill A hardware/software co-design reconfigurable network-on-chip FPGA emulation methodYing, Haoyuan; Hollstein, Thomas; Hofmann, Klaus2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) : Montpellier, France, 26-28 May, 20142014 / [8] p. : ill Hardware-based systems for partial sorting of streaming dataRjabov, ArtjomBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 59-62 : ill http://www.ester.ee/record=b2150914*est Hierarchical fault diagnosis in embedded digital systems with multi-level decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Evartson, Teet; Lensen, Harri; Aarna, Margit5th International Conference on Industrial Automation = Cinquieme Conference Internationale sur l'Automatisation Industrielle : June 11-13, 2007, Montreal, Canada2007 / [6] p. [CD-ROM] Hierarchical identification of NBTI-critical gates in nanoscale logicKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, MaksimLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill Hierarchical identification of untestable faults in sequential circuitsRaik, Jaan; Ubar, Raimund-Johannes; Krivenko, Anna; Kruus, Margus10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 668-671 : ill http://dx.doi.org/10.1109/DSD.2007.4341539 Hierarchical test generation for digital circuits represented by Decision Diagrams : thesis on informatics and system engineeringRaik, Jaan2001 https://www.ester.ee/record=b1578107*est Hierarchical test pattern generation and untestability identification techniques for synchronous sequential circuits = Hierarhilised testintegreerimise ja mittetestitavuse identifitseerimise meetodid sünkroonsetele järjestikskeemideleRannaste, Anna2010 https://www.ester.ee/record=b2637391*est High-level decision diagram based fault models for targeting FSMsRaik, Jaan; Ubar, Raimund-Johannes; Viilukas, Taavi9th EUROMICRO Conference on Digital Systems Design : Architectures, Methods and Tools (DSD 2006) : 30 August 2006-1 September 2006, Cavtat near Dubrovnik, Croatia : proceedings2006 / p. 353-358 : ill http://dx.doi.org/10.1109/DSD.2006.60 High-level decision diagrams based coverage metrics for verification and testJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-JohannesLATW 2009 : 10th IEEE Latin American Test Workshop : Buzios, Rio de Janero, Brazil, March 2-5, 20092009 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2009.4813792 High-level design error diagnosis using backtrace on decision diagramsRaik, Jaan; Repinski, Urmas; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, Anton28th Norchip Conference : Tampere, Finland, 15-16 November 2010 : conference program and papers2010 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2010.5669486 High-level modeling and testing of multiple control faults in digital systemsJasnetski, Artjom; Oyeniran, Adeboye Stephen; Tšertov, Anton; Schölzel, Mario; Ubar, Raimund-JohannesFormal proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 20-22, 2016, Košice, Slovakia2016 / [6] p. : ill http://dx.doi.org/10.1109/DDECS.2016.7482445 High-level synthesis of control and memory intensive applications : thesis submitted to the Royal Institute of Technology in partial fulfillment of the requirements for the degree of Doctor of TechnologyEllervee, Peeter2000 High-performance information processing in distributed computing systemsSklyarov, Valery; Rjabov, Artjom; Skliarova, Iouliia; Sudnitsõn, AleksanderInternational journal of innovative computing, information and control2016 / p. 139-160 : ill Holistic approach for Fault-Tolerant Network-on-Chip based many-core systems [Online resource]Azad, Siavoosh Payandeh; Niazmand, Behrad; Raik, Jaan; Jervan, Gert; Hollstein, ThomasarXiv.org2016 / [8] p. : ill How to generate high quality tests for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, Jaan2004 International Semiconductor Conference : 27th edition, October 4-6, 2004, Sinaia, Romania : CAS 2004 proceedings. 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Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderCompSysTech'13 : proceedings of the 14th International Conference on Computer Systems and Technologies2013 / p. 83-90 : ill Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill http://dx.doi.org/10.1007/s10836-016-5588-y Optimization of built-in self-test in digital systems = Sisseehitatud enesetestimise optimeerimine digitaalsüsteemidesKruus, Helena2011 Optimization of multisine excitation for a bioimpedance measurement deviceOjarand, Jaan; Annus, Paul; Min, Mart; Gorev, Maksim; Ellervee, PeeterI2MTC 2014 IEEE International Instrumentation and Measurement Technology Conference : Instrumentation and Measurement for Sustainable Development : Radisson Montevideo Victoria Plaza Hotel & Conference Center, May 12-15, 2014, Montevideo, Uruguay : proceedings2014 / p. 829-832 : ill Otstarbeka, õiglase ja tõhusa Eesti suunasUbar, Raimund-JohannesInsenerikultuur Eestis. 21995 / lk. 179-185 https://www.ester.ee/record=b1063622*est Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systemsUbar, Raimund-JohannesFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 303-324 : ill http://dx.doi.org/10.2298/FUEE1103303U Perceptions of software development practitioners on client learningOjastu, Deniss; Robal, Tarmo; Kalja, AhtoDatabases and Information Systems : proceedings of the 11th International Baltic Conference, Baltic DB&IS 2014 : Tallinn, Estonia, 8-11 June, 20142014 / p. 397-406 Performance analysis of cosimulating processor core in VHDL and SystemCSaif Abrar, Syed; Shyam Kiran A.; Jenihhin, Maksim; Raik, Jaan; Babu, C.Proceedings of the 2013 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 22–25 August 2013, Mysore, India2013 / p. 563-568 : ill Pildikesi poolest sajandist : arvutitehnika instituudi luguUbar, Raimund-Johannes2016 http://www.ester.ee/record=b4639382*est Pipelined execution of data-parallel algorithmsGorev, Maksim; Ubar, Raimund-JohannesBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 109-112 : ill Polymorphic configuration architecture for CGRAsJafri, Syed Mohammad Asad Hassan; Tajammul, Muhammad Adeel; Hermani, Ahmed; Paul, Kolin; Plosila, Juha; Ellervee, Peeter; Tenhunen, HannuIEEE transactions on Very Large Scale Integration (VLSI) Systems2016 / p. 403-407 : ill http://dx.doi.org/10.1109/TVLSI.2015.2402392 Practical works for on-line teaching design and test of digital circuitsJutman, Artur; Ubar, Raimund-Johannes; Hahanov, V.; Skvortsova, O.The 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume III2002 / p. 1223-1226 : ill http://dx.doi.org/10.1109/ICECS.2002.1046474 Practicing start-up culture in teaching embedded systemsReinsalu, Uljana; Azad, Siavoosh Payandeh; Leier, Mairo; Tammemäe, Kalle; Hollstein, ThomasEWME 2016 : 11th European Workshop on Microelectronics Education : May 11-13, 2016, Southampton, UK2016 / [6] p. : ill https://doi.org/10.1109/EWME.2016.7496463 PrefaceUbar, Raimund-Johannes; Raik, Jaan; Vierhaus, Heinrich TheodorDesign and test technology for dependable systems-on-chip2011 / p. xxii-xxviii PrefaceHaav, Hele-Mai; Kalja, Ahto; Robal, TarmoDatabases and information systems VIII : selected papers from the Eleventh International Baltic Conference, DB&IS 20142014 / p. v Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia2012 http://www.ester.ee/record=b2777270*est Processing N-ary trees in reconfigurable hardwareSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2013 25th International Conference on Microelectronics (ICM) : 15–18 December 2013, Beirut-Lebanon2013 / p. 13-16 : ill Processing sorted subsets in a multi-level reconfigurable computing systemRjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2015 / p. 30-33 : ill http://dx.doi.org/10.5755/j01.eee.21.2.11509 Professor Andres Keevallik juhib Eesti parima arengudünaamikaga kõrgkooliKeevallik, Andres; Ehavere, LiisRapla inimesed2016 / lk. 146-148 : ill Professor Raimund Ubari ettekanne [audoktorite promotsioonil TTÜ Nõukogu pidulikul istungil 1. sept. 1993]Ubar, Raimund-Johannes75 aastat Tallinna Tehnikaülikooli1994 / lk. 106-109 https://www.ester.ee/record=b1066846*est Programmeerimisvõistlus IEEEXtreme 9.0 24hTammemäe, KalleMente et Manu2015 / lk. 8-9 : fot Pulse wave registration from radial artery using photoplethysmographic methodPilt, Kristjan; Leier, Mairo; Silluta, Sandra; Kööts, Kristina; Meigas, Kalju; Viigimaa, MargusConference proceedings : 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society : Milan, Italy, August 25-29 20152015 / p. 6425-6428 : ill http://dx.doi.org/10.1109/EMBC.2015.7319863 Rahvusvahelise inseneriorganisatsiooni IEEE Eesti sektsioon sai 10-aastaseksTammemäe, KalleMente et Manu2016 / lk. 40-41 : fot http://www.ttu.ee/public/u/ulikool/Tutvustus/ajaleht-mente-et-manu/MM_2016_05/index.html Raimund Ubari lühisõnavõtt : riigi teadus-, kultuuri- ja spordipreemiate ning F.J.Wiedemanni keeleauhinna kätteandmisel 24. veebruaril 2016. aastalUbar, Raimund-JohannesRaimund-Johannes Ubar. Bibliograafia2016 / lk. 45-46 Refactoring - key to success for constantly developed projects [Electronic resource]Põld, Janari; Kalja, Ahto; Robal, TarmoProceedings of the 26th International Conference on Information Modelling and Knowledge Bases - EJC 2016 : June 6-10, 2016, Tampere, Finland2016 / p. 15-24. [USB] Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPGPalermo, N.; Tihhomirov, Valentin; Copetti, Thiago; Jenihhin, Maksim; Raik, Jaan; Kostin, Sergei2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102405 Rejuvenation of NBTI-impacted processors using evolutionary generation of assembler programsPellerey, Francesco; Jenihhin, Maksim; Squillero, Giovanni; Raik, Jaan; Sonza Reorda, Matteo; Tihhomirov, Valentin; Ubar, Raimund-Johannes2016 IEEE 25th Asian Test Symposium : 21-24 November 2016, Hiroshima, Japan2016 / p. 304-309 : ill https://doi.org/10.1109/ATS.2016.57 Reliability continuum and academic EDAJenihhin, Maksim2nd International Training School on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN ISTS 2015) : Prague, Czech Republic, July 13-15, 20152015 / [1] p Reliable health monitoring and fault management infrastructure based on embedded instrumentation and IEEE 1687Jutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE AUTOTESTCON 2016 : Anaheim, California, USA, September 12-15, 2016 : proceedings2016 / p. 240-249 : ill https://doi.org/10.1109/AUTEST.2016.7589605 Remote and virtual laboratories in problem-based learning scenariosWuttke, Heinz-Dietrich; Ubar, Raimund-Johannes; Henke, Karsten2010 IEEE International Symposium on Multimedia ISM 2010 : 13-15 December 2010, Taichung, Taiwan : proceedings2010 / p. 377-382 : ill http://dx.doi.org/10.1109/ISM.2010.63 Research and training environment for digital design and testUbar, Raimund-Johannes; Wuttke, Heinz-Dietrich34th ASEE/IEEE Frontiers in Education Conference : October 20-23, 2004, Savannah, GA2004 / p. S3F-18-S3F-23 : ill http://dx.doi.org/10.1109/FIE.2004.1408779 Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/ Reseeding using compaction of pre-generated LFSR sub-sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : Malta2008 / p. 1290-1295 : ill http://dx.doi.org/10.1109/ICECS.2008.4675096 Respiration signal extraction from photoplethysmogram using pulse wave amplitude variationLeier, Mairo; Jervan, Gert; Stork, Wilhelm2014 IEEE International Conference on Communications (ICC) : Sydney, Australia, June 10-14, 2014 2014 / p. 3535-3540 : ill Riistvara kirjeldamiskeel - VHDL : metoodiline materjalTammemäe, Kalle2003 http://www.ester.ee/record=b1605950*est Riistvara kirjeldamiskeel VHDL : metoodiline materjalTammemäe, Kalle2002 http://www.ester.ee/record=b1605950*est Runtime contention and bandwidth-aware adaptive routing selection strategies for networks-on-chipSamman, Faizal; Hollstein, Thomas; Glesner, ManfredIEEE transactions on parallel and distributed systems2013 / p. 1411-1421 : ill Run-time reconfigurable instruments for advanced board-level testingAleksejev, Igor; Jutman, Artur; Devadze, SergeiIEEE AUTOTESTCON 2016 : Anaheim, California, USA, September 12-15, 2016 : proceedings2016 / p. 385-392 : ill https://doi.org/10.1109/AUTEST.2016.7589627 Scalable algorithm for structural fault collapsing in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, Jaan2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 5-7, 2015, Daejeon, Korea2015 / p. 171-176 : ill Scalable open platform for reliable medical sensorics = Laiendatav avatud platvorm usaldusväärsete meditsiiniliste sensorite jaoksLeier, Mairo2016 Second IEEE East-West Design and Test WorkshopHahanov, Vladimir; Ubar, Raimund-JohannesIEEE journal of design & test of computers2004 / p. 594 Selected issues of modeling, verification and testing of digital systemsJutman, Artur2004 https://www.ester.ee/record=b1989760*est Self-diagnosis in digital systems = Isediagnoosivad digitaalsüsteemidKostin, Sergei2012 https://www.ester.ee/record=b2757857*est Self-learning tool for digital testUbar, Raimund-Johannes; Orasson, Elmet; Evartson, TeetProceedings of 2nd International Conference "Distance Learning - Educational Sphere of the XXI Century"2002 / p. 36-38 : ill Self-testing of pipe-lined signal processing architectures at-speedGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 25-28 : ill Service quality meter design for self-aware systemsTammemäe, Kalle; Leier, MairoAmiES-2015 : Ambient Intelligence and Embedded Systems : International Symposium, 24-26 September, 2015, Oostende, Belgium2015 / [4] p. : ill 7-valued algebra for transition delay fault analysisKõusaar, Jaak; Ubar, Raimund-JohannesBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 89-92 : ill Shared Structurally Synthesized BDDs for speeding-up parallel pattern simulation in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Raik, Jaan2015 Nordic Circuits and Systems Conference (NORCAS) : NORCHIP & International Symposium on System-on-Chip (SoC) : 1st IEEE NORCAS Conference : 26-28 October 2015, Oslo, Norway2015 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2015.7364406 Simulation-based hardware verification with high-level decision diagrams = Simuleerimisel põhinev riistvara verifitseerimine kõrgtaseme otsustusdiagrammidelJenihhin, Maksim2008 https://www.ester.ee/record=b2431332*est Simulation-based verification with APRICOT framework using high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesEast-West Design & Test Symposium : Moscow, September 18-21, 20092009 / p. 13-16 : ill Sissejuhatus füüsikasseLorents, Peeter1998 http://www.ester.ee/record=b1207605*est Sleep apnea pre-screening on neonates and children with shoe integrated sensors [Electronic resource]Leier, Mairo; Jervan, Gert31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / [4] p. : ill [USB] A small-size sleep apnea pre-screening prototype for neonates and childrenLeier, Mairo; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 49-52 : ill Smart photoplethysmographic sensor for pulse wave registration at different vascular depthsLeier, Mairo; Jervan, Gert; Pilt, KristjanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 67-70 : ill Smart photoplethysmographic sensor for pulse wave registration at different vascular depthsLeier, Mairo; Pilt, Kristjan; Karai, Deniss; Jervan, GertConference proceedings : 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society : Milan, Italy, August 25-29 20152015 / p. 1849-1852 : ill http://dx.doi.org/10.1109/EMBC.2015.7318741 Smart, wireless modular communication platformRuberg, Priit; Hollstein, Thomas; Reinsalu, Uljana; Tammemäe, Kalle; Le Moullec, Yannick; Kuusik, Alar; Reidla, Marko; Annus, PaulProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 111-112 : ill SoCDep2 : a framework for dependable task deployment on many-core systems under mixed-criticality constraintsAzad, Siavoosh Payandeh; Niazmand, Behrad; Ellervee, Peeter; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2016 11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC) : June 27‐29, 2016, Tallinn, Estonia2016 / [6] p. : ill https://doi.org/10.1109/ReCoSoC.2016.7533903 Software-based self-test generation for microprocessors with high-level decision diagramsUbar, Raimund-Johannes; Tšertov, Anton; Jasnetski, Artjom; Brik, MarinaLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill Software-based self-test generation for microprocessors with high-level decision diagramsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, Anton; Brik, MarinaProceedings of the Estonian Academy of Sciences2014 / p. 48-61 : ill https://artiklid.elnet.ee/record=b2665215*est Solving computationally intensive problems in reconfigurable hardware : a case studySkliarova, Iouliia; Vallejo, Tiago; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusJournal of convergence information technology (JCIT) : an international journal2013 / p. 601-609 : ill SPICE-inspired fast gate-level computation of NBTI-induced delays in nanoscale logicKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, Maksim2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings2015 / p. 223-228 : ill SSBDDs : advantageous model and efficient algorithms for digital circuit modeling, simulation & testJutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes5th International Workshop on Boolean Problems : September 19-20, 2002, Freiberg (Sachsen) : proceedings2002 / p. 157-166 : ill Structurally synthesized multiple input BDDs for simulation of digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, Artur16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009 : Yasmine Hammamet, Tunesia, 13-19 December, 20092009 / p. 451-454 : ill http://dx.doi.org/10.1109/ICECS.2009.5410895 A study on effective knowledge reuse in multi-platform web applications user interfacesMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoPICMET '15 : proceedings : Management of the Technology Age2015 / p. 1351-1361 : ill https://doi.org/10.1109/PICMET.2015.7273083 A study on immediate automatic usability evaluation of web application user interfacesMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoDatabases and Information Systems : 12th International Baltic Conference, DB&IS 2016, Riga, Latvia, July 4-6, 2016 : proceedings2016 / p. 257-271 : ill https://doi.org/10.1007/978-3-319-40180-5_18 Studying the incorrect user behaviour in sophisticated self-service portal user interfacesMarenkov, Jevgeni; Robal, Tarmo; Kalja, AhtoProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 71-74 : ill A suite of IEEE 1687 benchmark networksTšertov, Anton; Jutman, Artur; Devadze, Sergei2016 IEEE International Test Conference (ITC) : proceedings2016 / art. 6.1, p. 1-10 : ill https://doi.org/10.1109/TEST.2016.7805840 Süsteemse käsitluse alused : [loengukonspekt]Lorents, Peeter2004 http://www.ester.ee/record=b2871388*est Süsteemse käsitluse alused : riigikaitse ja julgeoleku põhiküsimusedLorents, Peeter1998 https://www.ester.ee/record=b1054840*est Synchronization, calibration and triggering of IEEE 1687 embedded instrumentsJutman, Artur; Devadze, Sergei; Shibin, KonstantinThe Seventeenth Workshop on RTL and High Level Testing (WRTLT'16) : November 24-25, 2016, Aki Grand Hotel, Hiroshima, Japan2016 / [6] p Synthesis of high-level decision diagrams for functional test pattern generationUbar, Raimund-Johannes; Raik, Jaan; Karputkin, Anton; Tombak, MatiProceedings of the 16th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2009 : Lodz, Poland, 25-27 June, 20092009 / p. 519-524 : ill Synthesis of multiple fault oriented test groups from single fault test sets [Electronic resource]Ubar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) : 26-28 March 2013, Abu Dhabi, UAE2013 / p. 36-41 : ill [CD-ROM] SysML in systems engineering courseKruus, Helena; Robal, Tarmo; Jervan, Gert10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 177-181 : ill System modeling for processor-centric test automation = Süsteemide modelleerimine protsessorikesksete testprogrammide sünteesi automatiseerimiseksTšertov, Anton2012 https://www.ester.ee/record=b2751131*est SystemC-based loose models : RTL abstraction for design understandingAbrar, Syed Saif; Jenihhin, Maksim; Raik, JaanWorkshop on Design Automation for Understanding Hardware Designs DUHDe 2015 : Grenoble, March 13, 20152015 / p. 1-6 SystemC-based loose models for simulation speed-up by abstraction of RTL IP coresAbrar, Syed Saif; Jenihhin, Maksim; Raik, Jaan2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings2015 / p. 71-74 : ill http://dx.doi.org/10.1109/DDECS.2015.39 System-level design of timing-sensitive network-on-chip based dependable systems = Kiipvõrkudel põhinevate ajakriitiliste ja töökindlate süsteemide kõrgtaseme disainTagel, Mihkel2012 https://www.ester.ee/record=b2778263*est Systems engineering course as a backbone of the computer engineering curriculaJervan, GertProceedings of the 24th International Conference on European Association for Education in Electrical and Information Engineering : 30-31 May 2013, Chania, Greece2013 / p. 163-166 : ill zamiaCAD : shall we dance?Jenihhin, MaksimOpen Source Tools for Verification : DVClub 14 January 20132013 / 1 p zamiaCAD : understand, develop and debug hardware designsJenihhin, Maksim; Tihhomirov, Valentin; Saif Abrar, Syed; Raik, Jaan; Bartsch, GünterDUHDe : 1st Workshop on Design Automation for Understanding Hardware Designs : March 28, 2014 : Friday Workshop at DATE 2014, Dresden, Germany2014 / p. 1-6 Zynq-based system for extracting sorted subsets from large data setsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderJournal of microelectronics, electronic components and materials2015 / p. 142-152 : ill A task-oriented design of a biologically inspired underwater robotListak, Madis2007 http://www.ester.ee/record=b2298234*est Teaching advanced test issues in digital electronicsUbar, Raimund-Johannes; Orasson, Elmet; Raik, Jaan; Wuttke, Heinz-DietrichProceedings of the 6th IEEE International Conference on Information Technology Based Higher Education and Training : ITHET : July 7-9, 2005, Juan Dolio, Dominican Republic2005 / p. S2B-1 - S2B-6 : ill http://dx.doi.org/10.1109/ITHET.2005.1560318 Teaching diagnostic modeling of digital systems with decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Raik, Jaan; Mironov, Dmitri; Evartson, Teet; Orasson, Elmet; Aarna, Margit; Wuttke, Heinz-DietrichProceedings of 12th IASTED International Conference on Computers and Advanced Technology in Education - CATE 2009 : St.Thomas, US, November 22-24, 20092009 / p. 1-6. [CD-ROM] Teaching digital RT-level self-test using a Java appletDevadze, Sergei; Jutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich20th IEEE NORCHIP Conference : Copenhagen, Denmark, November 11-12, 20022002 / p. 322-328 : ill Teaching digital test with BIST analyzerJutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 123-128 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610171 Teaching FPGA-based systemsSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, Margus2014 IEEE Global Engineering Education Conference (EDUCON) : Istanbul, Turkey, April 2-5, 20142014 / p. 460-469 : ill Teaching modeling in SysML/UML and problems encounteredKruus, Helena; Robal, Tarmo; Jervan, GertProceedings of the 25th International Conference on European Association for Education in Electrical and Information Engineering : 30 May-June 2014, Cesme, Türkiye2014 / p. 33-36 : ill Teaduspreemia laureaadi sõnavõtt : [teaduspreemiate üleandmisel]Ubar, Raimund-JohannesEesti Vabariigi preemiad 2016 : teadus. F. J. Wiedemanni keeleauhind. Kultuur. Sport2016 / lk. 20-21 Teaduspreemia pikaajalise tulemusliku teadus- ja arendustöö eest : Raimund UbarUbar, Raimund-JohannesEesti Vabariigi preemiad 2016 : teadus. F. J. Wiedemanni keeleauhind. Kultuur. Sport2016 / lk. 34-61 : fot., portr Tenniseharrastus Tallinna tehnikaülikoolis. Tennis on au sees : [kommenteerivad Tauno Otto ja Viveeth Govind]Sulling, Andres; Otto, Tauno; Govind, VineethMente et Manu2013 / lk. 26-27 : fot 10th IEEE European Test SymposiumUbar, Raimund-Johannes; Prinetto, Paolo; Raik, JaanIEEE journal of design & test of computers2005 / p. 480-481 : phot http://dx.doi.org/10.1109/MDT.2005.106 Test configurations for diagnosing faulty links in NoC switchesRaik, Jaan; Ubar, Raimund-Johannes; Govind, Vineeth12th IEEE European Test Symposium ETS 2007 : 20-24 May 2007, Freiburg, Germany : proceedings2007 / p. 29-34 : ill http://dx.doi.org/10.1109/ETS.2007.41 The benefits of self-awareness and attention in fog and mist computingPreden, Jürgo-Sören; Tammemäe, Kalle; Jantsch, Axel; Leier, Mairo; Riid, Andri; Calis, EmineComputer2015 / p. 37-45 : ill The most prominent software development concepts cited in IT professionals' blogsOjastu, Deniss; Robal, Tarmo; Kalja, AhtoPerspectives in business informatics research : 14th International Conference, BIR 2015, Tartu, Estonia, August 26-28, 2015 : proceedings2015 / p. 197-212 http://dx.doi.org/10.1007/978-3-319-21915-8_13 The synthesis level in Bloom's taxonomy - a nightmare for an LMSWuttke, Heinz-Dietrich; Ubar, Raimund-Johannes; Henke, Karsten; Jutman, Artur19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 199-204 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610186 3D parallel fault simulationGorev, Maksim; Ubar, Raimund-JohannesProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 39-42 : ill 3D routing model in WSN networkMosidze, VakhtangDoctoral School in Information and Communication Technology : proceedings of doctoral session of BEC 2014 : October 6-8 2014, Laulasmaa2014 / p. 11-14 : ill Tippteadus ja ülikoolUbar, Raimund-JohannesMente et Manu2014 / lk. 11-15 : fot https://artiklid.elnet.ee/record=b2705056*est Tippteadus ja ülikoolUbar, Raimund-JohannesTeadusmõte Eestis (VIII). Teaduskultuur : [artiklikogumik]2013 / lk. 46-53 : portr Tools and Techniques for event log analysisVaarandi, Risto2005 https://www.ester.ee/record=b2045293*est Towards adaptive web - analysing and recommending web users' behaviour = Veebikasutajate käitumise analüüs ja soovitused adaptiivse veebi loomiseksRobal, Tarmo2012 https://www.ester.ee/record=b2862251*est TPI-s kasutatavatest programmidest õppeinfo tõõtlemiselAit, OlevIII vabariiklik teaduslik-metoodiline konverents "Õppetöö teaduslik organiseerimine", Kääriku, 24.-25. oktoober 1973. : materjalid1973 / lk. 128-132 https://www.ester.ee/record=b1324071*est Transition delay fault simulation with parallel critical path back-tracing and 7-valued algebraKõusaar, Jaak; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, JaanMicroprocessors and microsystems2015 / p. 1130-1138 : ill http://dx.doi.org/10.1016/j.micpro.2015.05.003 TransMem : a memory architecture to support dynamic remapping and parallelism in low power high performance CGRAsTajammul, Muhammad Adeel; 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