A tool for advanced learning of LFSR-based testing principlesJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 175-178 : ill

A tool for teaching pseudo-random TPG principlesJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesProceedings of the 17th EAEEIE Annual Conference on Innovation in Education for Electrical and Information Engineering : Craiova, Romania, June 1st-3rd, 20062006 / p. 182-187 : ill

Automated software-based in-field self-test program synthesisJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, AntonInternational journal of microelectronics and computer science2017 / p. 57-64 : ill

Automated software-based self-test generation for microprocessorsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, AntonProceedings of the 24st International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2017 : Bydgoszcz, Poland, June 19-21, 20142017 / p. 453-458 : ill https://doi.org/10.23919/MIXDES.2017.8005252

Automatic SoC level test path synthesis based on partial functional modelsTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei2011 Asian Test Symposium (ATS) : New Delhi, India2011 / p. 532-538 https://ieeexplore.ieee.org/document/6114730

Automation of testing beyond the SoCsTšertov, Anton; Jutman, Artur; Devadze, SergeiInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 29-32 : ill

BIST analyzer : a training platform for SoC testing [Electronic resource]Jutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich37th Annual Frontiers in Education Conference : Global Engineering : Knowledge Without Borders, Opportunities Without Passports : Milwaukee, Wisconsin, October 10-13, 20072007 / p. S3H-8-S3H-13 : ill. [CD-ROM] http://dx.doi.org/10.1109/FIE.2007.4418125

Calculation of LFSR seed and polynomial pair for BIST applicationsJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 105-108 : ill

Calculation of LFSR seed and polynomial pair for BIST applications [Electronic resource]Jutman, Artur; Tšertov, Anton; Ubar, Raimund-Johannes2008 IEEE Design and Diagnostics of Electronic Circuits and Systems : Bratislava, Slovakia, April 16-18, 20082008 / p. 275-279 : ill. [CD-ROM]

E-learning environment for WEB-based study of testingUbar, Raimund-Johannes; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Jenihhin, Maksim; Aleksejev, Igor; Tšepurov, Anton; Tšertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, Heinz-DietrichProceedings of the 8th European Workshop on Microelectronics Education : EWME 2010 : Darmstadt, Germany, 10-12 May 20102010 / p. 47-52 : ill

Hardware/Software co-design in practice : MEMOCODE'08 contest experienceReinsalu, Uljana; Devadze, Sergei; Jutman, Artur; Tšertov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 55-58 : ill

High-level modeling and testing of multiple control faults in digital systemsJasnetski, Artjom; Oyeniran, Adeboye Stephen; Tšertov, Anton; Schölzel, Mario; Ubar, Raimund-JohannesFormal proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 20-22, 2016, Košice, Slovakia2016 / [6] p. : ill http://dx.doi.org/10.1109/DDECS.2016.7482445

High-level test data generation for software based self-test in microprocessorsOyeniran, Adeboye Stephen; Jasnetski, Artjom; Tšertov, Anton; Ubar, Raimund-Johannes2017 6th Mediterranean Conference on Embedded Computing (MECO) : including ECYPS'2017 : proceedings : research monograph : Bar, Montenegro, June 11th-15th, 20172017 / p. 86-91 : ill https://doi.org/10.1109/MECO.2017.7977167

IEEE 1687 compliant ecosystem for embedded instrumentation access and in-field health monitoringTšertov, Anton; Jutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE AUTOTESTCON 2018 : National Harbor, September 17-20, 2018 : proceedings2018 / 9 p.: ill https://doi.org/10.1109/AUTEST.2018.8532559

In-system programming of non-volatile memories on microprocessor-centric boardsTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomInternational journal of microelectronics and computer science2014 / p. 25-34 : ill

Laboratory framework TEAM for investigating the dependability issues of microprocessor systemsJasnetski, Artjom; Tšertov, Anton; Ubar, Raimund-Johannes; Kruus, Helena10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 80-83 : ill

Microprocessor-based system test using debug interfaceDevadze, Sergei; Jutman, Artur; Tšertov, Anton; Instenberg, Martin; Ubar, Raimund-Johannes26th Norchip Conference : Tallinn, Estonia, 17-18 November 2008 : formal proceedings2008 / p. 98-101 : ill http://dx.doi.org/10.1109/NORCHP.2008.4738291

New fault models and self-test generation for microprocessors using High-Level Decision DiagramsJasnetski, Artjom; Raik, Jaan; Tšertov, Anton; Ubar, Raimund-Johannes2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings2015 / p. 251-254 : ill

On automatic software-based self-test program generation based on high-Level decision diagramsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, AntonLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 177 http://dx.doi.org/10.1109/LATW.2016.7483357

On in-system programming of non-volatile memoriesTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomInternational journal of microelectronics and computer science2013 / p. 72-78 : ill

On in-system programming of non-volatile memoriesTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomProceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2013, Gdynia, Poland, June 20-22, 20132013 / p. 408-413 : ill

Post-silicon validation of IEEE 1687 reconfigurable scan networksDamljanovic, Aleksa; Jutman, Artur; Squillero, Giovanni; Tšertov, Anton2019 IEEE European Test Symposium (ETS) : proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791546

SoC and board modeling for processor-centric board testingTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei14th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : DSD 2011 : 31 August - 2 September 2011, Oulu, Finland : proceedings2011 / p. 575-582 : ill

Software-based self-test for microprocessors with high-level decision diagrams = Mikroprotsessorite tarkvara-põhine enesetestimine kõrgtasandi otsustusdiagrammide põhjalJasnetski, Artjom2018 https://digi.lib.ttu.ee/i/?10629

Software-based self-test generation for microprocessors with high-level decision diagramsUbar, Raimund-Johannes; Tšertov, Anton; Jasnetski, Artjom; Brik, MarinaLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill

Software-based self-test generation for microprocessors with high-level decision diagramsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, Anton; Brik, MarinaProceedings of the Estonian Academy of Sciences2014 / p. 48-61 : ill https://artiklid.elnet.ee/record=b2665215*est

Software-based self-test with decision diagrams for microprocessorsUbar, Raimund-Johannes; Jasnetski, Artjom; Tšertov, Anton; Oyeniran, Adeboye Stephen2018

A suite of IEEE 1687 benchmark networksTšertov, Anton; Jutman, Artur; Devadze, Sergei2016 IEEE International Test Conference (ITC) : proceedings2016 / art. 6.1, p. 1-10 : ill https://doi.org/10.1109/TEST.2016.7805840

System modeling for processor-centric test automation = Süsteemide modelleerimine protsessorikesksete testprogrammide sünteesi automatiseerimiseksTšertov, Anton2012 https://www.ester.ee/record=b2751131*est

Teaching digital test with BIST analyzerJutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 123-128 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610171

Testing beyond the SoCs in a lego styleTšertov, Anton; Jutman, Artur; Devadze, SergeiProceedings of IEEE East-West Design & Test Symposium (EWDTS'10) : St. Petersburg, Russia, September 17-20, 20102010 / p. 334-338 : ill

Triple-triple redundant 777 primary flight computerTšertov, AntonA & A2007 / 5, p. 38-47 : ill https://artiklid.elnet.ee/record=b1021108*est