Digital design flow with test activitiesDiener, Karl-Heinz; Elst, G.; Ivask, Eero; Jervan, Gert; Peng, Z.; Raik, Jaan; Ubar, Raimund-JohannesVILAB User Forum2000 / [11] p

FPGA design flow with automated test generationElst, G.; Diener, Karl-Heinz; Ivask, Eero; Raik, Jaan; Ubar, Raimund-JohannesProc. of German 11th Workshop on Test Technology and Reliability of Circuits and Systems : Potsdam, 19991999 / p. 120-123

Internet-based testability-driven test generation in the virtual environment MOSCITOSchneider, Andre; Diener, Karl-Heinz; Elst, G.; Ivask, Eero; Raik, Jaan; Ubar, Raimund-JohannesInternational Federation for Information Processing IFIP : International Workshop on IP-Based SoC Design 2002 : proceedings : Grenoble, October 30-31, 20022002 / p. 357-362 : ill http://publica.fraunhofer.de/dokumente/N-287433.html

Virtual laboratory for research in dependable microelectronicsDiener, Karl-Heinz; Elst, G.; Gramatova, Elena; Kuzmicz, W.; Peng, Z.; Ubar, Raimund-JohannesThe 7th Biennial Conference on Electronics and Microsystem Technology "Baltic Electronics Conference" : BEC 2000 : October 8 - 11, 2000, Tallinn, Estonia : conference proceedings2000 / p. 217-220 : ill

Построение тестов для проверки операционных частей дискретных системUbar, Raimund-Johannes; Lohuaru, T.; Štraube, B.; Elst, G.Машинное проектирование электронных устройств и систем1988 / с. 65-77

Электротехника и автоматикаRüstern, Ennu; Keevallik, Andres; Kruus, Margus; Salum, Kaja; Berkman, Boriss; Tammemäe, Kalle; Alango, Villem; Kont, Toomas; Ubar, Raimund-Johannes; Lohuaru, Tõnu; Štraube, B.; Elst, G.; Bombik, B.; Viies, Vladimir; Gallai, S.; Rang, Toomas; Laansoo, Ants; Männama, Vello; Pikkov, Otto; Gurjanov, Boris; Opotski, Aleksei; Velmre, Enn1988 https://www.ester.ee/record=b1256708*est