A new approach to build a low-level malicious fault list starting from high-level description and alternative graphsBenso, A.; Prinetto, Paolo; Rebaudengo, M.; Sonza, M.; Ubar, Raimund-JohannesProceedings IEEE European Design & Test Conference, Paris, March 17-20, 19971997 / p. 560-565

Exploiting high-level descriptions for circuits fault tolerance assessmentsBenso, A.; Prinetto, Paolo; Rebaudengo, M.; Sonza Reorda, Matteo; Raik, Jaan; Ubar, Raimund-Johannes1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Paris, October 20-22, 19971997 / p. 212-216