Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanMicroprocessors and microsystems2020 / art. 103117, 12 p https://doi.org/10.1016/j.micpro.2020.103117 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Conditional fault collapsing in digital circuits with shared structurally synthesized BDDs [Online resource]Jürimägi, Lembit; Ubar, Raimund-JohannesBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p. : ill https://doi.org/10.1109/BEC.2018.8600967

Double phase fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Josifovska, Galina; Oyeniran, Adeboye StephenDSD 2015 : 18th Euromicro Conference on Digital Systems Design : 26-28 August 2015, Funchal, Madeira, Portugal2015 / p. 700-705 : ill

Fault collapsing in digital circuits using fast fault dominance and equivalence analysis with SSBDDsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, JaanVLSI-SoC : Design for Reliability, Security, and Low Power : 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015 Daejeon, Korea, October 5-7, 2015 : revised selected papers2016 / p. 23-45 : ill http://dx.doi.org/10.1007/978-3-319-46097-0_2

How to prove that a circuit is fault-free?Ubar, Raimund-Johannes; Kostin, Sergei; Raik, JaanProceedings : 15th Euromicro Conference on Digital System Design DSD 2012 : 5-8 September 2012, Cesme, Izmir, Turkey2012 / p. 427-430 : ill

Multiple stuck-at-fault detection theoremUbar, Raimund-Johannes; Kostin, Sergei; Raik, JaanProceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia2012 / p. 236-241 : ill

Scalable algorithm for structural fault collapsing in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, Jaan2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 5-7, 2015, Daejeon, Korea2015 / p. 171-176 : ill

True path tracing in structurally synthesized BDDs for testability analysis of
digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Oyeniran, Adeboye Stephen; Jenihhin, MaksimEuromicro Conference on Digital System Design : DSD 2019 : 28 - 30 August 2019
Kallithea, Chalkidiki, Greece : proceedings2019 / p. 492-499 : ill https://doi.org/10.1109/DSD.2019.00077