Analysis and comparison of attainable hardware acceleration in all programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 345-352 : ill http://dx.doi.org/10.1109/DSD.2015.45 At-speed testing of inter-die connections of 3D-SICs in the presence of shore logicShibin, Konstantin; Chickermane, Vivek; Keller, Brion; Papameletis, Christos; Marinissen, Erik Jan2015 Asian Test Symposium : ATS 2015 : 22-25 November 2015, Mumbai, Maharashtra, India : proceedings2015 / p. 79-84 : ill http://dx.doi.org/10.1109/ATS.2015.21 DyMeP : an infrastructure to support dynamic memory binding for runtime mapping in CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, Peeter; Hemani, Ahmed; Tenhunen, Hannu; Plosila, Juha28th International Conference on VLSI Design : held concurrently with 14th International Conference on Embedded Systems : 3-7 January 2015, Bangalore, India : proceedings2015 / p. 547-552 : ill http://dx.doi.org/10.1109/VLSID.2015.98 A framework for comprehensive automated evaluation of concurrent online checkersSaltarelli, Pietro; Niazmand, Behrad; Raik, Jaan; Hariharan, Ranganathan; Jervan, Gert; Hollstein, ThomasEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 288-292 : ill http://dx.doi.org/10.1109/DSD.2015.15 How to prove that a circuit is fault-free?Ubar, Raimund-Johannes; Kostin, Sergei; Raik, JaanProceedings : 15th Euromicro Conference on Digital System Design DSD 2012 : 5-8 September 2012, Cesme, Izmir, Turkey2012 / p. 427-430 : ill Identifying NBTI-critical paths in nanoscale logicUbar, Raimund-Johannes; Vargas, Fabian; Jenihhin, Maksim; Raik, Jaan; Kostin, Sergei; Bolzani Poehls, Leticia16th Euromicro Conference series on Digital System Design : DSD 2013 : proceedings : 4-6 September 2013, Santander, Spain2013 / p. 136-141 : ill