• Hardware trojan insertion in finalized layouts : from methodology to a silicon demonstrationPerez, Tiago Diadami; Pagliarini, Samuel NascimentoIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2023 / p. 2094-2107 https://doi.org/10.1109/TCAD.2022.3223846 https://www.scopus.com/sourceid/27724 https://www.scopus.com/record/display.uri?eid=2-s2.0-85144011739&origin=resultslist&sort=plf-f&src=s&sid=f6bea21f940b112407e8b3b930cd5a56&sot=b&sdt=b&s=DOI%2810.1109%2FTCAD.2022.3223846%29&sl=141&sessionSearchId=f6bea21f940b112407e8b3b930cd5a56 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20T%20COMPUT%20AID%20D&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:001017411600002
• Hybrid protection of digital FIR filtersAksoy, Levent; Nguyen, Quang-Linh; Almeida, Felipe; Raik, Jaan; Flottes, Marie-Lise; Dupuis, Sophie; Pagliarini, Samuel NascimentoIEEE transactions on Very Large Scale Integration (VLSI) Systems2023 / p. 812-825 : ill https://doi.org/10.1109/TVLSI.2023.3253641 https://www.scopus.com/sourceid/12300 https://www.scopus.com/record/display.uri?eid=2-s2.0-85151356738&origin=inward&txGid=2cbf13db49fa5db5d3e09767a51c47df https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20T%20VLSI%20SYST&year=2023 https://www.webofscience.com/wos/woscc/full-record/WOS:000953458300001
• Impact of orientation on the bias of SRAM-based PUFsAbideen, Zain Ul; Wang, Rui; Perez, Tiago Diadami; Schrijen, Geert-Jan; Pagliarini, Samuel NascimentoIEEE design & test2024 / p. 14-20 https://doi.org/10.1109/MDAT.2023.3322621
• OTA-C realization of PIλ brake and throttle controllers for autonomous vehiclesDimeas, Ilias; Psychalinos, Costas; Elwakil, Ahmed; Tepljakov, Aleksei2017 European Conference on Circuit Theory and Design (ECCTD 2017) : Catania, Italy, 4 - 6 September, 20172017 / p. 39-40 : ill http://dx.doi.org/10.1109/ECCTD.2017.8093229
• SALSy : security-aware layout synthesisEslami, Mohammad; Perez, Tiago Diadami; Pagliarini, Samuel NascimentoarXiv.org2024 / 13 p. : ill https://doi.org/10.48550/arXiv.2308.06201
• Split-chip design to prevent IP reverse engineeringPagliarini, Samuel Nascimento; Sweeney, Joseph; Mai, Ken; Blanton, Shawn; Mitra, Subhasish; Pileggi, LarryIEEE Design and Test2020 / p. 109-118 https://doi.org/10.1109/MDAT.2020.3033255 https://www.scopus.com/sourceid/21100286806 https://www.scopus.com/record/display.uri?eid=2-s2.0-85095985466&origin=inward&txGid=5cd9b065fa2590c9dd1c7c529d74978c https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20DES%20TEST&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:000678331400021
• A survey on split manufacturing : attacks, defenses, and challengesPerez, Tiago Diadami; Pagliarini, Samuel NascimentoIEEE Access2020 / p. 184013-184035 https://doi.org/10.1109/ACCESS.2020.3029339 https://www.scopus.com/sourceid/21100374601 https://www.scopus.com/record/display.uri?eid=2-s2.0-85101841306&origin=inward&txGid=1abec245e5e8a6b34906241854d7052d https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20ACCESS&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:000579348000001