Hierarchical test pattern generation and untestability identification techniques for synchronous sequential circuits = Hierarhilised testintegreerimise ja mittetestitavuse identifitseerimise meetodid sünkroonsetele järjestikskeemidele
author
supervisor
statement of authorship
Anna Rannaste ; [supervisor: Jaan Raik]
type of dissertation
doktoritöö
university/scientific institution
Tallinna Tehnikaülikool
location of publication
Tallinn
publisher
year of publication
pages
128 p. : ill
series
Theses of Tallinn University of Technology. C, Thesis on informatics and system engineering, ISSN 1406-4731 ; 58
subject term
subject of form
ISSN
1406-4731
ISBN
978-9949-23-041-9
notes
Includes bibliogr. Thesis (Ph.D. in Computer and Systems Engineering) : Tallinn University of Technology, 2010. Autori CV inglise ja eesti keeles lk. 117-123. Ka eestikeelse tiitellehega. Annotatsioon eesti keeles, lk. 9
Kättesaadav ka võrguteavikuna
TTÜ department
language
inglise
Rannaste, A. Hierarchical test pattern generation and untestability identification techniques for synchronous sequential circuits = Hierarhilised testintegreerimise ja mittetestitavuse identifitseerimise meetodid sünkroonsetele järjestikskeemidele. Tallinn : TUT Press, 2010. 128 p. : ill. (Theses of Tallinn University of Technology. C, Thesis on informatics and system engineering, ISSN 1406-4731 ; 58). https://www.ester.ee/record=b2637391*est