Fast RTL fault simulation using decision diagrams and bitwise set operations
author
Reinsalu, Uljana
Raik, Jaan
Ubar, Raimund-Johannes
Ellervee, Peeter
statement of authorship
Uljana Reinsalu, Jaan Raik, Raimund Ubar, Peeter Ellervee
source
2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011, Vancouver, Canada
location of publication
[S.l.]
publisher
IEEE
year of publication
2011
pages
p. 164-170
conference name, date
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011
conference location
Vancouver, Canada
url
https://ieeexplore.ieee.org/document/6104440
subject term
digitaaltehnika
rikked
kompuutersimulatsioon
otsustusdiagrammid
keyword
register-transfer level
fault simulation
high-level decision diagrams
ISSN
1550-5774
ISBN
978-1-4577-1713-0
notes
Bibliogr.: 14 ref
language
inglise