New fault models and self-test generation for microprocessors using High-Level Decision Diagrams
author
Jasnetski, Artjom
Raik, Jaan
Tšertov, Anton
Ubar, Raimund-Johannes
statement of authorship
Artjom Jasnetski, Jaan Raik, Anton Tsertov, Raimund Ubar
source
2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings
location of publication
Los Alamitos
publisher
IEEE Computer Society
year of publication
2015
pages
p. 251-254 : ill
conference name, date
18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015, 22-24 April, 2015
conference location
Belgrade, Serbia
subject term
mikroprotsessorid
testimine
tarkvara
otsustusdiagrammid
keyword
microprocessor
software-based self-test (SBST)
test program generation
high-level decision diagrams
ISBN
978-1-4799-6780-3
notes
Bibliogr.: 22 ref
TalTech department
arvutitehnika instituut
language
inglise