Toggle navigation
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Databases
Publications
Searching
My bookmarks
0
routing logic (keyword)
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
Add criteria
Advanced search
filter
Clear
×
types of item
book
..
journal article
..
newspaper article
..
book article
..
dissertation
..
Open Access
..
Scientific publications
..
year
year of publication
Loading..
author
Loading..
TalTech department
Loading..
subject term
Loading..
series
Loading..
name of the person
Loading..
keyword
Loading..
Clear
Number of records
3
Look more..
(1/105)
Export
export all inquiry results
(3)
Save TXT fail
print
Open for editing with marked entries
my bookmarks
display
Bibliographic view
Short view
sort
author ascending
author descending
year of publication ascending
year of publication descending
title ascending
title descending
1
book article
Automated minimization of concurrent online checkers for network-on-chips
Saltarelli, Pietro
;
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Raik, Jaan
;
Jervan, Gert
;
Hollstein, Thomas
10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC 2015) : Bremen, 29 June - 1 July 2015
2015
/
[8] p. : ill
http://dx.doi.org/10.1109/ReCoSoC.2015.7238079
book article
2
book article
A framework for area-efficient concurrent online checkers design
Saltarelli, Pietro
;
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Raik, Jaan
;
Jervan, Gert
;
Hollstein, Thomas
MEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia
2015
/
p. 64-69 : ill
book article
3
book article
A framework for comprehensive automated evaluation of concurrent online checkers
Saltarelli, Pietro
;
Niazmand, Behrad
;
Raik, Jaan
;
Hariharan, Ranganathan
;
Jervan, Gert
;
Hollstein, Thomas
Euromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings
2015
/
p. 288-292 : ill
http://dx.doi.org/10.1109/DSD.2015.15
book article
Number of records 3, displaying
1 - 3
keyword
105
1.
routing logic
2.
logic-based distributed routing
3.
logic and philosophy of logic
4.
bandwidth-aware adaptive routing
5.
congestion-aware adaptive routing
6.
contention-aware adaptive routing
7.
data routing
8.
geographic routing
9.
inventory routing problem
10.
inventory routing problem (IRP)
11.
multi-hop routing protocol
12.
optimized routing approach for critical and emergency networks
13.
optimized routing approach for critical and emergency networks simulations
14.
policy-based routing security
15.
quantum-enhanced secure and energy-efficient routing (QSEER) protocol
16.
Routing
17.
routing algorithm
18.
routing algorithms
19.
routing closure
20.
routing policy
21.
routing protocol
22.
routing protocols
23.
ship routing
24.
tactical multi-hop routing protocol
25.
3D routing
26.
algebra of logic
27.
binary logic controller
28.
Boolean logic
29.
Compound logic locking
30.
Compound logic locking (CLL)
31.
constructive logic
32.
default logic
33.
diagrammatic logic
34.
digital logic
35.
dynamic logic
36.
epistemic logic
37.
ethics and logic
38.
formal logic
39.
fuzzy logic
40.
fuzzy logic
41.
fuzzy logic control
42.
fuzzy logic controller
43.
fuzzy logic controller (FLC)
44.
fuzzy logic model
45.
graphical method of logic
46.
history of logic
47.
Hoare logic
48.
Husserl and Pierce on logic of probability
49.
independence-friendly logic
50.
Inductive logic programming
51.
intuitionistic logic
52.
linear logic
53.
linear logic of Petri nets
54.
logic
55.
logic built-in self-test
56.
logic cell library
57.
logic circuit
58.
logic design
59.
logic diagram
60.
logic diagrams
61.
logic education
62.
logic for pragmatics
63.
logic gates
64.
logic in AI
65.
logic in computer science
66.
logic in society
67.
logic level
68.
logic level and high level BDDs
69.
logic locking
70.
logic machine
71.
logic models
72.
logic models and simulation
73.
logic notation
74.
logic obfuscation
75.
logic of bunched implications
76.
logic of relatives
77.
logic of science
78.
logic of speech acts
79.
logic simulation
80.
logic synthesis
81.
logic teaching
82.
malicious logic
83.
mathematical logic
84.
modal logic
85.
Natural logic
86.
Peirce's existential graphs and transcendental logic
87.
philosophical logic
88.
philosophy of logic
89.
pragmatic logic
90.
probabilistic relational program logic
91.
programmable logic
92.
programmable logic controller (PLC)
93.
quantitative logic
94.
quantum logic
95.
race logic
96.
reconfigurable logic
97.
S4 modal logic
98.
S-D logic
99.
Semi-substructural logic
100.
Service-Dominant logic
101.
stateful logic computation
102.
substructural logic
103.
symbolic knowledge in Husserlian pure logic
104.
symbolic logic
105.
temporal logic
×
match
starts with
ends with
containes
sort
Relevance
ascending
descending
year of publication
author
TalTech department
subject term
series
name of the person
keyword
Otsing
Valikud
0
year of publication
AND
OR
NOT
author
AND
OR
NOT
TalTech department
AND
OR
NOT
subject term
AND
OR
NOT
series
AND
OR
NOT
name of the person
AND
OR
NOT
keyword
AND
OR
NOT