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26
book article
Identification and rejuvenation of NBTI-critical paths in nanoscale logic circuits
Jenihhin, Maksim
1st International Workshop on Reliability and Aging in Forthcoming Electronic Systems : May 28-29, 2015, Cluj-Napoca, Romania
2015
/
[1] p
book article
27
book
Impulss-seadmed : laboratoorne töö nr. 5 : trigerid loogikaelementidel
1986
https://www.ester.ee/record=b1240931*est
book
28
book
Impulss-seadmed : laboratoorne töö nr. 8 : lineaarpinge generaator
1986
https://www.ester.ee/record=b2618544*est
book
29
book
Integraalsed loogikalülitused : katsestendi kirjeldus ja laboratoorsete tööde juhendid eriala "Elektriajamid ja tööstusseadmete automatiseerimine" 0628 üliõpilastele
1989
https://www.ester.ee/record=b1216651*est
book
30
book
Logic and system design of digital systems
Baranov, Samary
;
Keevallik, Andres
2008
https://www.ester.ee/record=b2358322*est
book
31
book
Loogikalülituste koostamise metoodika : õppevahend
Ariste, Andri
1978
https://www.ester.ee/record=b1305228*est
book
32
book article
Loogikaskeemid ja binaardiagrammid
Buldas, Ahto
Aastaraamat 1994 - 1996 / Eesti Matemaatika Selts
1999
/
lk. 6-11
book article
33
dissertation
Model synthesis from VHDL for the functional test generation system
Krupnova, Helena
1993
https://www.ester.ee/record=b2090509*est
dissertation
34
journal article EST
/
journal article ENG
Modeling and simulation of circuits with shared structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Jürimägi, Lembit
;
Raik, Jaan
;
Viies, Vladimir
Microprocessors and microsystems
2017
/
p. 56-61 : ill
https://doi.org/10.1016/j.micpro.2016.09.006
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
35
book article
On multiple fault detection in combinational logic circuits
Birger, Alexander
BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings
1996
/
p. 225-228
book article
36
book article
On pattern-based database design and implementation
Eessaar, Erki
Proceedings : 6th ACIS International Conference on Software Engineering Research, Management and Applications : SERA 2008 : 20-22 August 2008, Prague, Czech Republic
2008
/
p. 235-242
https://www.researchgate.net/publication/4370312_On_Pattern-Based_Database_Design_and_Implementation
book article
37
book article
Open source on-chip logic analyzer for FPGA-s
Ehrenpreis, Lauri
;
Ellervee, Peeter
;
Tammemäe, Kalle
BEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference
2006
/
p. 99-102 : ill
book article
38
book
Operatsioonautomaadid digitaalarvutites : metoodiline materjal
1987
https://www.ester.ee/record=b1234461*est
book
39
book
Parallel processing in FPGA-based digital circuits and systems
Sklyarov, Valery
;
Skliarova, Iouliia
2013
http://www.ester.ee/record=b2946103*est
book
40
book article
Performance evaluation for FPGA-based processing of tree-like structures
Sklyarov, Valery
;
Skliarova, Iouliia
;
Mihhailov, Dmitri
;
Sudnitsõn, Aleksander
19th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Sevilla, Spain, December 9-12, 2012
2012
/
p. 217-220 : ill
https://ieeexplore.ieee.org/document/6463762
book article
41
journal article
Programmeeritavad loogikaelemendid
Roasto, Indrek
Elektriala
2006
/
1, lk. 24-26 : ill
journal article
42
book article
Recursion and hierarchy in digital design and prototyping : a case study
Mihhailov, Dmitri
;
Kruus, Margus
;
Sklyarov, Valery
;
Skliarova, Iouliia
;
Sudnitsõn, Aleksander
Computer Systems and Technologies : 12th International Conference, CompSysTech'11 : Vienna, Austria, June 16-17, 2011 : proceedings
2011
/
p. 45-50 : ill
https://dl.acm.org/doi/pdf/10.1145/2023607.2023616
book article
43
journal article
RESAA: A Removal and Structural Analysis Attack Against Compound Logic Locking
Almeida, Felipe
;
Aksoy, Levent
;
Pagliarini, Samuel Nascimento
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2025
/
p. 1348-1360
https://doi.org//10.1109/TVLSI.2025.3534658
journal article
Related publications
1
Advanced Hardware Protection Mechanisms : A Study on Logic Locking and Circuit Obfuscation Techniques [Võrguteavik] = Täiustatud riistvara kaitsemehhanismid : uuring loogikalukustamise ja hägustamise tehnikate kohta
44
journal article
RESAA: A Removal and Structural Analysis Attack Against Compound Logic Locking : [preprint]
Almeida, Felipe
;
Aksoy, Levent
;
Pagliarini, Samuel Nascimento
arXiv.org
2025
/
12 p. : ill
https://doi.org/10.48550/arXiv.2409.16959
journal article
45
book article
Resynthesis-based attacks against logic locking
Almeida, Felipe
;
Aksoy, Levent
;
Nguyen, Quang-Linh
;
Dupuis, Sophie
;
Flottes, Marie-Lise
;
Pagliarini, Samuel Nascimento
2023 24th International Symposium on Quality Electronic Design (ISQED) : San Francisco, 5-7 April 2023
2023
/
8 p. : ill
https://doi.org/10.1109/ISQED57927.2023.10129403
Article at Scopus
Article at WOS
book article
Related publications
1
Advanced Hardware Protection Mechanisms : A Study on Logic Locking and Circuit Obfuscation Techniques [Võrguteavik] = Täiustatud riistvara kaitsemehhanismid : uuring loogikalukustamise ja hägustamise tehnikate kohta
46
book article
Shift register based TPG for at-speed interconnect BIST
Jutman, Artur
MIEL 2004 : 24th International Conference on Microelectronics : Niš, Serbia and Montenegro, 16-19 May 2004 : proceedings. Volume 2
2004
/
p. 751-754 : ill
https://ieeexplore.ieee.org/document/1314941?signout=success
book article
47
book article
3D parallel fault simulation
Gorev, Maksim
;
Ubar, Raimund-Johannes
Proceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere
2014
/
p. 39-42 : ill
book article
48
book article
Translating behavioral VHDL for emulation
Ellervee, Peeter
;
Reinsalu, Uljana
;
Arhipov, Anton
25th IEEE NORCHIP Conference : Aalborg, Denmark, 19-20 November 2007
2007
/
? p
https://ieeexplore.ieee.org/document/4481073
book article
49
book article
Алгоритм генерирования тестов для комбинационных логических схем
Pall, I.
;
Ubar, Raimund-Johannes
XX студенческая научно-техническая конференция вузов Прибалтийских республик, Белорусской ССР и Молдавской ССР : тезисы докладов. Часть 1
1974
/
с. 133
https://www.ester.ee/record=b1306141*est
book article
50
book article
Декомпозиционный метод диагноза неисправностей в комбинационных схемах
Ubar, Raimund-Johannes
Анализ и моделирование технических устройств и систем АСУТП
1978
/
с. 3-22 : илл
https://www.ester.ee/record=b2191003*est
https://digikogu.taltech.ee/et/Item/00fbff38-ccfb-411c-ad55-0c6b943b766b
book article
Number of records 61, displaying
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