From RTL liveness assertions to cost-effective hardware checkers
author
Hariharan, Ranganathan
Ghasempouri, Tara
Niazmand, Behrad
Raik, Jaan
statement of authorship
Ranganathan Hariharan, Tara Ghasempouri, Behrad Niazmand, Jaan Raik
source
XXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings
location of publication
[S.l.]
publisher
IEEE
year of publication
2018
pages
6 p. : ill
conference name, date
XXXIII Conference on Design of Circuits and Integrated Systems (DCIS), 14-16 Nov. 2018
conference location
Lyon, France
url
https://doi.org/10.1109/DCIS.2018.8681487
subject term
riistvara
töökindlus
andmehaldus
ISSN
2640-5563
2471-6170
ISBN
978-1-7281-0171-2
978-1-7281-0172-9
notes
Bibliogr.: 24 ref
TTÜ department
arvutisüsteemide instituut
language
inglise
Uurimisrühm
Centre of dependable computing systems