An efficient systolic array algorithm for memory-based VLSI array implementation of DST
author
Chiper, Doru-Florin
statement of authorship
Doru-Florin Chiper
location of publication
[Tallinn]
year of publication
pages
p. 265-268: ill
ISBN
9985-59-026-0
notes
Bibl. 5 ref
Chiper, D.-F. An efficient systolic array algorithm for memory-based VLSI array implementation of DST // BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings. [Tallinn], 1996. p. 265-268: ill.