Hybrid BIST energy minimisation technique for system-on-chip testing
author
Jervan, Gert
Peng, Zebo
Shchenova, Tatjana
Ubar, Raimund-Johannes
statement of authorship
G.Jervan, Z.Peng, T.Shchenova and R.Ubar
source
IEE proceedings computers & digital techniques
journal volume number month
Vol. 153
year of publication
2006
pages
4, p. 208-216 : ill
url
https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=5ae755d323ccba87f8ff886334e3dd6d33560874
subject term
arvuti arhitektuur
kiipvõrgud
ISSN
1350-2387
notes
Bibliogr.: 37 ref
language
inglise