Ultra-low latency NoC testing via pseudo-random test pattern compaction
author
Tatenguem, Herve
Govind, Vineeth
Raik, Jaan
statement of authorship
Herve’ Tatenguemy, ... Vineeth Govind, Jaan Raik, ... [et al.]
source
SoC 2012 : International Symposium on System-on-Chip 2012 : Tampere, Finland, October 11-12, 2012
location of publication
[S.l.]
publisher
IEEE
year of publication
2012
pages
6 p. : ill
conference name, date
International Symposium on System-on-Chip, October 10-12, 2012
conference location
Tampere, Finland
url
https://ieeexplore.ieee.org/document/6376370
subject term
lülitid
registrid
multipleksimine
arvuti arhitektuur
testimine
ISBN
978-1-4673-2896-8
notes
Bibliogr.: 22 ref
language
inglise