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Verifying cache architecture vulnerabilities using a formal security verification flow

author
statement of authorship
Tara Ghasempouri, Jaan Raik, Kolin Paul, Cezar Reinbrecht, Said Hamdioui, Mottaqiallah ‪Taouil‬
source
publisher
journal volume number month
vol. 119
year of publication
pages
art. 114085
url
ISSN
0026-2714
notes
Bibliogr.: 65 ref
scientific publication
teaduspublikatsioon
language
inglise
Reserch Group
Centre of dependable computing systems
Ghasempouri, T., Raik, J., Paul, K., Reinbrecht, C., Hamdioui, S., ‪Taouil‬, M. Verifying cache architecture vulnerabilities using a formal security verification flow // Microelectronics reliability (2021) vol. 119, art. 114085. https://doi.org/10.1016/j.microrel.2021.114085