Optimization of memory-constrained hybrid BIST for testing core-based systems
statement of authorship
G.Jervan, H.Kruus, E.Orasson, R.Ubar
source
Proceedings of the IEEE 2nd International Symposium on Industrial Embedded Systems : SIES'2007 : Lisbon, Portugal, 4-6 July 2007
location of publication
[S.l.]
publisher
year of publication
pages
p. 71-77
Jervan, G., Kruus, H., Orasson, E., Ubar, R.-J. Optimization of memory-constrained hybrid BIST for testing core-based systems // Proceedings of the IEEE 2nd International Symposium on Industrial Embedded Systems : SIES'2007 : Lisbon, Portugal, 4-6 July 2007. [S.l.] : IEEE Computer Society, 2007. p. 71-77.