At-speed testing of inter-die connections of 3D-SICs in the presence of shore logic
author
Shibin, Konstantin
Chickermane, Vivek
Keller, Brion
Papameletis, Christos
Marinissen, Erik Jan
statement of authorship
Konstantin Shibin, Vivek Chickermane, Brion Keller, Christos Papameletis, Erik Jan Marinissen
source
2015 Asian Test Symposium : ATS 2015 : 22-25 November 2015, Mumbai, Maharashtra, India : proceedings
location of publication
Los Alamitos
publisher
CPS
year of publication
2015
pages
p. 79-84 : ill
conference name, date
24th Asian Test Symposium ATS 2015, 22-25 November, 2015
conference location
Mumbai, India
url
https://doi.org/10.1109/ATS.2015.21
subject term
arvuti arhitektuur
testimine
Scopus
https://www.scopus.com/sourceid/14494
https://www.scopus.com/record/display.uri?eid=2-s2.0-84963538046&origin=inward&txGid=4880e5666162ec99a8fd71cfcc83bda8
WOS
https://www.webofscience.com/wos/woscc/full-record/WOS:000386184700014
quartile
Q3
category (general)
Engineering
Tehnika
category (sub)
Engineering. Electrical and electronic engineering
Tehnika. Elektri- ja elektroonikatehnika
ISSN
1081-7735
ISBN
978-1-4673-9739-1
notes
Bibliogr.: 26 ref
scientific publication
teaduspublikatsioon
classifier
3.1
TalTech department
arvutitehnika instituut
language
inglise