Fault model and test synthesis for RISC-processors
author
Ubar, Raimund-Johannes
Markus, Antti
Jervan, Gert
Raik, Jaan
statement of authorship
R.Ubar, A.Markus, G.Jervan, J.Raik
source
BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings
location of publication
[Tallinn]
year of publication
1996
pages
p. 229-232: ill
subject term
digitaaltehnika
protsessorid
testimine
süntees
rikked
mudelid
ISBN
9985-59-026-0
notes
Bibl. 6 ref
language
inglise