Model reduction in VLSI circuit design
author
Rogoza, V.S.
statement of authorship
Rogoza V.S
location of publication
Tallinn
year of publication
pages
p. 113-119: ill
notes
Bibl. 6 ref
review
Kokkuvõte: Mudelite redutseerimine suure integratsiooniastmega ahelate disaini puhul
language
inglise
Rogoza, V.S. Model reduction in VLSI circuit design // Automation, simulation & measurement : ASM'91 : 3rd biennal conference, Tallinn, October 7-11, 1991. Section S / Tallinn Technical University. Tallinn, 1992. p. 113-119: ill.