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Hariharan, Ranganathan (author)
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1
book article
Automated minimization of concurrent online checkers for network-on-chips
Saltarelli, Pietro
;
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Raik, Jaan
;
Jervan, Gert
;
Hollstein, Thomas
10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC 2015) : Bremen, 29 June - 1 July 2015
2015
/
[8] p. : ill
http://dx.doi.org/10.1109/ReCoSoC.2015.7238079
book article
2
dissertation
Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemidele
Hariharan, Ranganathan
2019
https://digi.lib.ttu.ee/i/?12854
https://www.ester.ee/record=b5243161*est
dissertation
3
book article
Extended checkers for control part of routers in network-on-chips
Hariharan, Ranganathan
;
Niazmand, Behrad
;
Hollstein, Thomas
;
Raik, Jaan
;
Jervan, Gert
MEDIAN 2015 : the 4th Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : March 13, 2015, Grenoble, France
2015
/
p. 36-39 : ill
book article
4
book article
Extended checkers for logic-based distributed routing in network-on-chips
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Govind, Vineeth
;
Jervan, Gert
;
Hollstein, Thomas
;
Raik, Jaan
Proceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere
2014
/
p. 83-86 : ill
book article
5
book article
Extended checkers for logic-based distributed routing in network-on-chips
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Govind, Vineeth
;
Jervan, Gert
;
Hollstein, Thomas
;
Raik, Jaan
BEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia
2014
/
p. 77-80 : ill
book article
6
book article
A framework for area-efficient concurrent online checkers design
Saltarelli, Pietro
;
Niazmand, Behrad
;
Hariharan, Ranganathan
;
Raik, Jaan
;
Jervan, Gert
;
Hollstein, Thomas
MEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia
2015
/
p. 64-69 : ill
book article
7
book article
A framework for combining concurrent checking and online embedded test for low-latency fault detection in NoC routers
Saltarelli, Pietro
;
Niazmand, Behrad
;
Raik, Jaan
;
Govind, Vineeth
;
Hollstein, Thomas
;
Jervan, Gert
;
Hariharan, Ranganathan
NOCS '15 : International Symposium on Networks-on-Chip : Vancouver, BC, Canada, September 28-30, 2015
2015
/
[8] p. : ill
http://dx.doi.org/10.1145/2786572.2788713
book article
8
book article
A framework for comprehensive automated evaluation of concurrent online checkers
Saltarelli, Pietro
;
Niazmand, Behrad
;
Raik, Jaan
;
Hariharan, Ranganathan
;
Jervan, Gert
;
Hollstein, Thomas
Euromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings
2015
/
p. 288-292 : ill
http://dx.doi.org/10.1109/DSD.2015.15
book article
9
book article
From RTL liveness assertions to cost-effective hardware checkers
Hariharan, Ranganathan
;
Ghasempouri, Tara
;
Niazmand, Behrad
;
Raik, Jaan
XXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings
2018
/
6 p. : ill
https://doi.org/10.1109/DCIS.2018.8681487
book article
Number of records 9, displaying
1 - 9
name of the person
2
1.
Hariharan, Ranganathan
2.
Ranganathan, Shiyali Ramamrita
CV
2
1.
Hariharan, Ranganathan 1987
2.
Ranganathan Hariharan
author
1
1.
Hariharan, Ranganathan
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