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A hybrid BIST architecture and its optimization for SoC testing (title)
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book article
A hybrid BIST architecture and its optimization for SoC testing
Jervan, Gert
;
Peng, Zebo
;
Ubar, Raimund-Johannes
;
Kruus, Helena
Proceedings of the 3rd International Symposium on Quality Electronic Design : ISQED 2002, March 18-21, 2002, San Jose, California
2002
/
p. 273-279 : ill
https://ieeexplore.ieee.org/document/996750
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hybrid BIST
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Bound Optimization BY Quadratic Approximation optimization algorithm
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