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Versatile direct and transpose matrix multiplication with chained operations : an optimized architecture using circulant matrices

author
Iakymchuk, Taras
Rosado-Munoz, Alfredo
Mompean, Manuel Bataller
Villora, Jose Vicente Frances
Osimiry, Emmanuel Ovie
statement of authorship
Taras Iakymchuk, Alfredo Rosado-Muñoz, Manuel Bataller Mompéan, José Vicente Francés Víllora, Emmanuel Ovie Osimiry
source
IEEE Transactions on Computers
publisher
IEEE Computer Society
journal volume number month
vol. 65, 11
year of publication
2016
pages
p. 3470 - 3479
url
https://doi.org/10.1109/TC.2016.2538235
subject term
arvutusmeetodid
maatriksid (matemaatika)
integraallülitused
algoritmid
keyword
arithmetic circuits
arithmetic coprocessor
circulant matrix
FPGA
matrix multiplication
systolic architecture
ISSN
0018-9340
notes
Bibliogr.: 30 ref
scientific publication
teaduspublikatsioon
classifier
1.1
Scopus
Journal metrics at Scopus
Article at Scopus
WOS
Journal metrics at WOS
Article at WOS
category (general)
Computer science
Mathematics
category (sub)
Computer science. Computational theory and mathematics
Mathematics. Theoretical computer science
Computer science. Hardware and architecture
Computer science. Software
kvartiil
Q1
TTÜ department
elektroenergeetika ja mehhatroonika instituut
language
inglise
Iakymchuk, T., Rosado-Munoz, A., Mompean, M.B., Villora, J.V.F., Osimiry, E.O. Versatile direct and transpose matrix multiplication with chained operations : an optimized architecture using circulant matrices // IEEE Transactions on Computers (2016) vol. 65, 11, p. 3470 - 3479. https://doi.org/10.1109/TC.2016.2538235