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A framework for combining concurrent checking and online embedded test for low-latency fault detection in NoC routers

author
statement of authorship
Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Vineeth Govind, Thomas Hollstein, Gert Jervan, Ranganathan Hariharan
source
NOCS '15 : International Symposium on Networks-on-Chip : Vancouver, BC, Canada, September 28-30, 2015
location of publication
New York
publisher
ACM
year of publication
pages
[8] p. : ill
conference name, date
9th International Symposium on Networks-on-Chip, September 28-30, 2015
conference location
Vancouver, BC, Canada
url
ISBN
978-1-4503-3396-2
notes
Bibliogr.: 21 ref
TTÜ department
language
inglise
subject term
keyword
network-on-chip
fault tolerant router design
concurrent online checking
embedded test
test packets
Saltarelli, P., Niazmand, B., Raik, J., Govind, V., Hollstein, T., Jervan, G., Hariharan, R. A framework for combining concurrent checking and online embedded test for low-latency fault detection in NoC routers // NOCS '15 : International Symposium on Networks-on-Chip : Vancouver, BC, Canada, September 28-30, 2015. New York : ACM, 2015. [8] p. : ill. http://dx.doi.org/10.1145/2786572.2788713