Formalization of finite state machines with data path for the verification of high-level synthesis

autor
vastutusandmed
Dominique Borrione, Julia Dushina, Laurence Pierre
ilmumiskoht
Los Alamitos
kirjastus/väljaandja
ilmumisaasta
leheküljed
p. 99-102: ill
ISBN
0-8186-8704-5
märkused
Bibl. p. 102
keel
inglise
Borrione, D., Dushina, J., Pierre, L. Formalization of finite state machines with data path for the verification of high-level synthesis // XI Brasilian Symposium on Integrated Circuit Design, September 30 - October 3, 1998, Rio de Janeiro, Brazil : proceedings. Los Alamitos : IEEE Computer Society, 1998. p. 99-102: ill. https://ieeexplore.ieee.org/document/715419