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CMOS (võtmesõna)

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Kirjeid leitud 2
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artikkel kogumikus

A fully differential, 200MHz, programmable gain, level-shifting, hybrid amplifier/power combiner/test buffer, using pre-distortion for enhanced linearityKampus, Vahur; Rang, Toomas; Knaller, DanielPRIME 2018 : 14th Conference on PhD Research in Microelectronics and Electronics2018 / p. 5-8 : ill https://doi.org/10.1109/PRIME.2018.8430372

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A smart capless voltage regulator for very high bandwidth A/D and D/A converters in a standard 28nm CMOS processKampus, Vahur; Rang, ToomasBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 43-46 : ill http://www.ester.ee/record=b2150914*est

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Kirjeid leitud 2, kuvan 1 - 2

1. A 48 by 48 CMOS cellular neural network chip for image processing
2. A CMOS constant-gm rail-to-rail input stage using a new electronic zener diode
3. A CMOS quadrature baseband frequency synthesizer/modulator
4. A compact 16*16 CMOS cellular neural network chip
5. A Side-Channel Hardware Trojan in 65nm CMOS with 2μW precision and Multi-bit Leakage Capability
6. CMOS bandpass filters using immittance converters
7. CMOS current source for shortened square wave waveforms
8. CMOS defects analysis using DefSim measurement environment
9. CMOS low power current source with reduced circuit complexity
10. CMOS OpAmp input impedance
11. CMOS SP chip for resistor type semiconductor gas sensors
12. CMOS technology based current source with harmonic reducing properties
13. DefSim: a remote laboratory for studying physical defects in CMOS digital circuits
14. DefSim: CMOS defects on chip for research and education
15. DefSim: measurement environment for CMOS defects
16. DefSim-based exercises for studying defects in CMOS gates
17. Design and optimization of super-speed CMOS/CBiCMOS circuits based on TCAD and time-logical simulator
18. Design of a configurable order statistic filter in CMOS VLSI
19. A 48 by 48 CMOS cellular neural network chip for image processing
20. Hierarchical analysis of short defects between metal lines in CMOS IC
21. Low power CMOS current source for shortened square wave signals
22. Low-noise CMOS-charge amplifier for a silicon strip detector
23. Multi-level and mixed-level simulation of CMOS switched-current sigma-delta modulator
24. Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement
25. State assignment for CMOS implementation of low power FSM networks
26. Visualisation of in-capillary microreactions using a CMOS-based absorbance detector
27. A smart capless voltage regulator for very high bandwidth A/D and D/A converters in a standard 28nm CMOS process

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