Kashirova, L., Evartson, T., Tveretina, O.

täiskirje prindi

FPGA technological mapping for low power implementation

autor

Kasirova, Lilia

Evartson, Teet

Tveretina, Olga

vastutusandmed

L. ashirova, T. Evartson, O. Tveretina

allikas

Proceedings of the 4th International Workshop Mixed Design of Integrated Circuits and Systems : MIXDES'97 : Poznan, Poland, 12-14 June 1997

ilmumiskoht

[S.l.]

ilmumisaasta

1997

leheküljed

p. 259-264

keel

inglise

Kashirova, L., Evartson, T., Tveretina, O. FPGA technological mapping for low power implementation // Proceedings of the 4th International Workshop Mixed Design of Integrated Circuits and Systems : MIXDES'97 : Poznan, Poland, 12-14 June 1997. [S.l.], 1997. p. 259-264.