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A global methodology for test program generation starting from high level specificationsStorojev, Sergei; Leveugle, Regis; Saucier, GabrieleBEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 11994 / p. 305-311: ill https://www.ester.ee/record=b2150914*est

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A system for teaching basic and advanced topics of IEEE 1149.1 boundary scan standard (extended abstract)Jutman, Artur; Rosin, Vjatšeslav; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichProceedings of 16th EAEEIE Conference on Innovation in Education for Electrical and Information Engineering (EIE) : Lappeenranta, Finland, 6th-8th June 20052005 / [2] p. : ill

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Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill

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An external test approach for network-on-a-chip switchesRaik, Jaan; Govind, Vineeth; Ubar, Raimund-Johannes2002-2011 : 20th Anniversary compendium of papers from Asian Test Symposium2011 / p. 185-190 : ill

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book article

An external test approach for network-on-a-chip switchesRaik, Jaan; Govind, Vineeth; Ubar, Raimund-JohannesATS '06 : Proceedings of the 15th Asian Test Symposium : November 20-23, 2006, Fukuoka, Japan2006 / p. 437-442 : ill http://dx.doi.org/10.1109/ATS.2006.23

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Analog design tools : n problemsKukk, VelloBEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 21994 / p. 375-384: ill https://www.ester.ee/record=b2150914*est

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Analog integrated circuits and signal processingEllervee, Peeter; Jervan, Gert2010

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book article

Analysis of a test method for delay faults in NoC interconnectsBengtsson, Tomas; Jutman, Artur; Kumar, Shashi; Ubar, Raimund-Johannes; Peng, ZeboProceedings of the IEEE East-West Design & Test Workshop (EWDTW'06) : Sochi, Russia, September 15-19, 20062006 / p. 42-46 : ill

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Analyzing side-channel attack vulnerabilities at RTLLai, Xinhui; Jenihhin, Maksim2023 IEEE 24th Latin American Test Symposium (LATS)2023 / 2 p. : ill https://doi.org/10.1109/LATS58125.2023.10154497

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book article

Application specific true critical paths identification in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Oyeniran, Adeboye Stephen2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS 2019) : 1-3 July 2019, Greece2019 / p. 299-304 : ill https://doi.org/10.1109/IOLTS.2019.8854442

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APRICOT : a framework for teaching digital systems verificationRaik, Jaan; Jenihhin, Maksim; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-Johannes19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 172-177 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610181

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journal article EST / journal article ENG

Areeba : an area efficient binary huff-curve architectureSajid, Asher; Rashid, Muhammad; Jamal, Sajjad Shaukat; Imran, Malik; Alotaibi, Saud S.; Sinky, Mohammed H.Electronics (Switzerland)2021 / art. 1490 https://doi.org/10.3390/electronics10121490 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

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Arvuti nööpaugusAgur, UstusHorisont1976 / lk. 12-15 : ill https://www.ester.ee/record=b1072243*est http://www.digar.ee/id/nlib-digar:291330

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At-speed self-testing of high-performance pipe-lined processing architectures [Electronic resource]Gorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, Mart31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / p. 1-6 : ill [USB]

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journal article

Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill

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Automated design error localization in RTL designsJenihhin, Maksim; Tšepurov, Anton; Tihhomirov, Valentin; Raik, Jaan; Hantson, Hanno; Ubar, Raimund-Johannes; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-DietrichIEEE design & test of computers2014 / p. 83-92 : ill http://dx.doi.org/10.1109/MDAT.2013.2271420

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journal article EST / journal article ENG

Automated identification of application-dependent safe faults in automotive systems-on-a-chipsBagbaba, Ahmet Cagri; Augusto da Silva, Felipe; Sonza Reorda, Matteo; Hamdioui, Said; Jenihhin, Maksim; Sauer, ChristianElectronics2022 / art. 319 https://doi.org/10.3390/electronics11030319 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

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book article

Automatic SoC level test path synthesis based on partial functional modelsTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei2011 Asian Test Symposium (ATS) : New Delhi, India2011 / p. 532-538 https://ieeexplore.ieee.org/document/6114730

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book article

Benchmarking advanced security closure of physical layoutsEslami, Mohammad; Knechtel, Johann; Sinanoglu, Ozgur; Karri, Ramesh; Pagliarini, Samuel NascimentoISPD '23 : proceedings of the 2023 International Symposium on Physical Design2023 / p. 256-264 https://doi.org/10.1145/3569052.3578924 https://dl.acm.org/doi/pdf/10.1145/3569052.3578924

book article

Seotud publikatsioonid 1

On the use of defensive schemes for hardware security = Kaitseskeemid riistvara turvalisuse tagamiseks

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book article

Biotundlikud süsteemid molekulaarselt jäljendatud elektrit juhtivatest polümeeridestÖpik, Andres; Reut, Jekaterina; Sõritski, Vitali; Tretjakov, AlekseiTallinna Tehnikaülikooli aastaraamat 20122013 / lk. 40-44 : ill

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BIST analyzer : a training platform for SoC testing [Electronic resource]Jutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich37th Annual Frontiers in Education Conference : Global Engineering : Knowledge Without Borders, Opportunities Without Passports : Milwaukee, Wisconsin, October 10-13, 20072007 / p. S3H-8-S3H-13 : ill. [CD-ROM] http://dx.doi.org/10.1109/FIE.2007.4418125

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A CAD system for teaching digital testUbar, Raimund-Johannes; Ivask, Eero; Paomets, Priidu; Raik, JaanBEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 11994 / p. 369-372: ill

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journal article

Cal-Techist PocketronicuniToomsalu, ArvoA & A2005 / 4, lk. 9-12 https://artiklid.elnet.ee/record=b1018130*est

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book article

Capacitance measurement with MSP430 microcontrollersMärtens, Olev; Pille, Siim; Reidla, MarkoEDERC2014 : proceedings of the 6th European Embedded Design in Education and Research Conference, 11-12 September 2014, Milan, Italy2014 / p. 260-263 : ill

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Capacitance-to-digital : a single chip detector for capillary electrophoresisDrevinskas, Tomas; Kaljurand, Mihkel; Maruška, AudriusElectrophoresis2014 / p. 2401-2407 : ill

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