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51
book article
Fault diagnosis in integrated circuits with BIST
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Raik, Jaan
;
Evartson, Teet
;
Lensen, Harri
10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings
2007
/
p. 604-610 : ill
http://dx.doi.org/10.1109/DSD.2007.4341530
book article
52
journal article
Fault diagnosis in VLSI devices
Ubar, Raimund-Johannes
Proceedings of the Estonian Academy of Sciences. Engineering
1995
/
1, p. 51-67
journal article
53
journal article
Fault effect reasoning in digital systems by topological view on low- and high-level decision diagrams
Ubar, Raimund-Johannes
Вестник Томского государственного университета. Управление, вычислительная техника и информатика
2014
/
p. 99-113 : ill
http://journals.tsu.ru/informatics/&journal_page=archive&id=923&article_id=12107
journal article
54
book article
Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDs
Devadze, Sergei
;
Raik, Jaan
;
Jutman, Artur
;
Ubar, Raimund-Johannes
7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings
2006
/
p. 97-102 : ill
book article
55
book article
Faults and fault models for integrated circuits and systems [Electronic resource] : [slides]
Ubar, Raimund-Johannes
Design and Test Technology for Dependable Hardware/Software Systems : DEDIS/DAAD Summer Academy : BTU Cottbus, Sept. 1st-12th, 2008
2008
/
[64] p. : ill. [CD-ROM]
book article
56
book article
Foreword to the 12th IEEE DDECS Symposium
Pliva, Zdenek
;
Manhaeve, Hans
;
Renovell, Michel
;
Novak, Ondrej
;
Ubar, Raimund-Johannes
;
Drabkova, Jindra
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 15-17, 2009, Liberec, Czech Republic
2009
/
p. iii
http://dx.doi.org/10.1109/DDECS.2009.5012081
book article
57
journal article
From virtual characterization to test-chips : DFM analysis through pattern enumeration
Martins, Mayler G.A.
;
Pagliarini, Samuel Nascimento
;
Isgenc, Mehmet Meric
;
Pileggi, Larry
IEEE transactions on computer-aided design of integrated circuits and systems
2020
/
p. 520-532
https://doi.org//10.1109/TCAD.2018.2889772
journal article
58
book article
Gate-level modelling of NBTI-induced delays under process variations
Copetti, Thiago
;
Cardoso Medeiros, Guilherme
;
Bolzani Poehls, Leticia
;
Vargas, Fabian
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
;
Ubar, Raimund-Johannes
LATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 2016
2016
/
p. 75-80 : ill
http://dx.doi.org/10.1109/LATW.2016.7483343
book article
59
dissertation
Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon
Imran, Malik
2023
https://www.ester.ee/record=b5571216*est
https://doi.org/10.23658/taltech.33/2023
https://digikogu.taltech.ee/et/Item/75aeb070-cb8b-4511-beaf-cbea3fca147d
https://www.ester.ee/record=b5571216*est
dissertation
Seotud publikatsioonid
6
An experimental study of building blocks of lattice-based NIST post-quantum cryptographic algorithms
An open-source library of large integer polynomial multipliers
Design space exploration of SABER in 65nm ASIC
High-speed SABER key encapsulation mechanism in 65nm CMOS
A versatile and flexible multiplier generator for Large integer polynomials
High-speed design of postquantum cryptography with optimized hashing and multiplication
60
book
Hardware/software co-design for programmable systems-on-chip
Sklyarov, Valery
;
Skliarova, Iouliia
;
Silva, João
;
Rjabov, Artjom
;
Sudnitsõn, Aleksander
;
Cardoso, Cláudia
2014
http://www.ester.ee/record=b3087107*est
book
61
book article
High-level decision diagram based fault models for targeting FSMs
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Viilukas, Taavi
9th EUROMICRO Conference on Digital Systems Design : Architectures, Methods and Tools (DSD 2006) : 30 August 2006-1 September 2006, Cavtat near Dubrovnik, Croatia : proceedings
2006
/
p. 353-358 : ill
http://dx.doi.org/10.1109/DSD.2006.60
book article
62
book article
High-Level Decision Diagram manipulations for code coverage analysis
Minakova, Karina
;
Reinsalu, Uljana
;
Tšepurov, Anton
;
Raik, Jaan
;
Jenihhin, Maksim
;
Ubar, Raimund-Johannes
;
Ellervee, Peeter
BEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia
2008
/
p. 207-210 : ill
book article
63
book article
High-level decision diagrams based coverage metrics for verification and test
Jenihhin, Maksim
;
Raik, Jaan
;
Tšepurov, Anton
;
Reinsalu, Uljana
;
Ubar, Raimund-Johannes
LATW 2009 : 10th IEEE Latin American Test Workshop : Buzios, Rio de Janero, Brazil, March 2-5, 2009
2009
/
[6] p. : ill
http://dx.doi.org/10.1109/LATW.2009.4813792
book article
64
book article
High-level modeling and testing of multiple control faults in digital systems
Jasnetski, Artjom
;
Oyeniran, Adeboye Stephen
;
Tšertov, Anton
;
Schölzel, Mario
;
Ubar, Raimund-Johannes
Formal proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 20-22, 2016, Košice, Slovakia
2016
/
[6] p. : ill
http://dx.doi.org/10.1109/DDECS.2016.7482445
book article
65
journal article EST
/
journal article ENG
High-speed SABER key encapsulation mechanism in 65nm CMOS
Imran, Malik
;
Almeida, Felipe
;
Basso, Andrea
;
Roy, Sujoy Sinha
;
Pagliarini, Samuel Nascimento
Journal of cryptographic engineering
2023
/
p. 461-471 : ill
https://doi.org/10.1007/s13389-023-00316-2
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
Seotud publikatsioonid
1
Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon
66
newspaper article
Hiina võis sanktsioonide kiuste jõuda uue kiibitehnoloogiani [Võrguväljaanne]
Einama, Kaido
Postimees
2022
Hiina võis sanktsioonide kiuste jõuda uue kiibitehnoloogiani
newspaper article
67
book article
How to emulate Network-on-Chip?
Ellervee, Peeter
;
Jervan, Gert
Proceedings of the IEEE East-West Design & Test Workshop (EWDTW'06) : Sochi, Russia, September 15-19, 2006
2006
/
p. 282-286 : ill
book article
68
book article
Hybrid BIST optimization using reseeding and test set compaction
Jervan, Gert
;
Orasson, Elmet
;
Kruus, Helena
;
Ubar, Raimund-Johannes
10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings
2007
/
p. 596-603 : ill
http://dx.doi.org/10.1109/DSD.2007.4341529
book article
69
journal article EST
/
journal article ENG
Hybrid protection of digital FIR filters
Aksoy, Levent
;
Nguyen, Quang-Linh
;
Almeida, Felipe
;
Raik, Jaan
;
Flottes, Marie-Lise
;
Dupuis, Sophie
;
Pagliarini, Samuel Nascimento
IEEE transactions on Very Large Scale Integration (VLSI) Systems
2023
/
p. 812-825 : ill
https://doi.org/10.1109/TVLSI.2023.3253641
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
70
journal article
I²L új irányrat a bipoláris technikában I
Rang, Toomas
Mérés és automatika: megjelenik a Méréstechnikai és Automatizálási Tudományos Egyesület Szerkesztésében
1979
/
p. 191-195
journal article
71
journal article
I²L, új irányrat a bipoláris technikában II
Rang, Toomas
Mérés és automatika: megjelenik a Méréstechnikai és Automatizálási Tudományos Egyesület Szerkesztésében
1979
/
p. 279-283
journal article
72
journal article
IEEE Norchip 2003. a. konverents
Ellervee, Peeter
A & A
2004
/
1, lk. 48-49
https://artiklid.elnet.ee/record=b1015000*est
journal article
73
journal article
Impact of orientation on the bias of SRAM-based PUFs
Abideen, Zain Ul
;
Wang, Rui
;
Perez, Tiago Diadami
;
Schrijen, Geert-Jan
;
Pagliarini, Samuel Nascimento
IEEE design & test
2024
/
p. 14-20
https://doi.org/10.1109/MDAT.2023.3322621
journal article
Seotud publikatsioonid
1
Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendina
74
journal article
Impact of orientation on the bias of SRAM-based PUFs
Abideen, Zain Ul
;
Wang, Rui
;
Perez, Tiago Diadami
;
Schrijen, Geert-Jan
;
Pagliarini, Samuel Nascimento
arXiv.org
2023
/
7 p. : ill
https://doi.org/10.48550/arXiv.2308.06730
journal article
Seotud publikatsioonid
1
Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendina
75
book article
Improving the efficiency of timing simulation in digital circuits by using structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Jutman, Artur
;
Peng, Z.
IEEE Norchip Conference
2000
/
p. 254-261
book article
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