Jenihhin, M., Taheri, M., Cherezova, N., Ahmadilivani, M.H., Selg, H., Jutman, A., Shibin, K., Tsertov, A., Devadze, S., Kodamanchili, R.M., Rafiq, A., Raik, J., Daneshtalab, M.

full record print

Keynote: cost-efficient reliability for Edge-AI chips

author

Jenihhin, Maksim

Taheri, Mahdi

Cherezova, Natalia

Ahmadilivani, Mohammad Hasan

Selg, Hardi

Jutman, Artur

Shibin, Konstantin

Tsertov, Anton

Devadze, Sergei

Kodamanchili, Rama Mounika

Rafiq, Ahsan

Raik, Jaan

Daneshtalab, Masoud

statement of authorship

Maksim Jenihhin, Mahdi Taheri, Natalia Cherezova, Mohammad Hasan Ahmadilivani, Hardi Selg, Artur Jutman

source

2024 IEEE 25th Latin American Test Symposium (LATS)

location of publication

Piscataway, New Jersey

publisher

IEEE

year of publication

2024

conference name, date

25th IEEE Latin American Test Symposium, LATS 2024, 9-12 April 2024

conference location

Maceio, Brazil

url

https://doi.org/10.1109/LATS62223.2024.10534610

ISBN

979-835036555-9

notes

Bibliogr.: 13 ref

scientific publication

teaduspublikatsioon

TTÜ department

arvutisüsteemide instituut

language

inglise

Märksõnad ja võtmesõnad

subject term

riistvara

tehisintellekt

andmevood

keyword

AxC

DNNs

edge AI

edge computing

HW accelerators

reliability assessment and enhancement

soft errors

Teaduspublikatsiooni meetrika

Scopus

Article at Scopus

classifier

3.1

Jenihhin, M., Taheri, M., Cherezova, N., Ahmadilivani, M.H., Selg, H., Jutman, A., Shibin, K., Tsertov, A., Devadze, S., Kodamanchili, R.M., Rafiq, A., Raik, J., Daneshtalab, M. Keynote: cost-efficient reliability for Edge-AI chips // 2024 IEEE 25th Latin American Test Symposium (LATS). Piscataway, New Jersey : IEEE, 2024. https://doi.org/10.1109/LATS62223.2024.10534610