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126
book article
Low-cost open-source flow velocity sensor for droplet generators
Prabatama, Nicky Andre
;
Jõemaa, Rauno
;
Hegedus, Kristof
;
Pardy, Tamas
2022 18th Biennial Baltic Electronics Conference (BEC)
2022
/
p. 1-4
https://doi.org/10.1109/BEC56180.2022.9935606
book article
Related publications
1
Development of a transferable microfluidic droplet generator = Ülekantava mikrovedelik-tilkade generaatori arendus
127
book article
Machine learning clustering techniques for selective mitigation of critical design features
Lange, Thomas
;
Balakrishnan, Aneesh
;
Glorieux, Maximilien
;
Alexandrescu, Dan
;
Sterpone, Luca
Proceedings : 2020 26th IEEE International Symposium on On-Line Testing and Robust System Design : IOLTS 2020, Napoli, Italy, July 13-16, 2020 : virtual edition
2020
/
7 p. : ill
https://doi.org/10.1109/IOLTS50870.2020.9159751
book article
128
journal article EST
/
journal article ENG
Mapping the types of modularity in open-source hardware
Gavras, Kosmas
;
Kostakis, Vasileios
Design Science
2021
/
e13
https://doi.org/10.1017/dsj.2021.11
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
129
dissertation
Methods for reliability assessment and enhancement of deep neural networks hardware accelerators = Süvanärvivõrkude riistvara kiirendite töökindluse hindamine ja täiustamine
Taheri, Mahdi
2025
https://www.ester.ee/record=b5728368*est
https://digikogu.taltech.ee/et/Item/9cf79768-17bc-44ec-a828-e4ccf6cf93f1
https://doi.org/10.23658/taltech.4/2025
dissertation
Related publications
14
APPRAISER : DNN fault resilience analysis employing approximation errors
DeepAxe : a framework for exploration of approximation and reliability trade-offs in DNN accelerators
Special session : approximation and fault resiliency of DNN accelerators
A systematic literature review on hardware reliability assessment methods for deep neural networks
AdAM: adaptive fault-tolerant approximate multiplier for edge DNN accelerators
Special session: reliability assessment recipes for DNN accelerators
Keynote: cost-efficient reliability for Edge-AI chips
Enhancing fault resilience of QNNs by selective neuron splitting
DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs’ Reliability Assessment
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators
AdAM: Adaptive Approximate Multiplier for Fault Tolerance in DNN Accelerators
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators
FORTUNE: A Negative Memory Overhead Hardware-Agnostic Fault TOleRance TechniqUe in DNNs
Heterogeneous Approximation of DNN HW Accelerators based on Channels Vulnerability
130
book
Microprocessors and microsystems : MICPRO : embedded hardware design
2010
book
131
book
Mikrokontrollerite M68HC11 ja Satt Con 05 riist- ja tarkvara : metoodiline materjal
Tammemäe, Kalle
;
Toomsalu, Arvo
1995
https://www.ester.ee/record=b1069449*est
book
132
journal article
Mikrokontrollerite riistvara turbest
Toomsalu, Arvo
Arvutustehnika ja Andmetöötlus
1997
/
7/8, lk. 7-12
journal article
133
journal article
Miniatuurne märgvara [Võrguteavik]
Tammemäe, Kalle
Arvutimaailm
2018
/
14 p
https://www.am.ee/margvara
journal article
134
journal article
Mis on Dhrystone ja Whetstone?
Toomsalu, Arvo
Arvutustehnika ja Andmetöötlus
1992
/
10, lk. 11-15
journal article
135
book
Model and Data Engineering : 10th international conference, MEDI 2021, Tallinn, Estonia, June 21–23, 2021 : proceedings
2021
https://doi.org/10.1007/978-3-030-78428-7
book
136
dissertation
Model synthesis from VHDL for the functional test generation system
Krupnova, Helena
1993
https://www.ester.ee/record=b2090509*est
dissertation
137
book article
Modular approach to training hardware design for modular teaching [Electronic resource]
Galkin, Ilja
;
Laugis, Juhan
EPE-PEMC 2006 : 12th International Power Electronics and Motion Control Conference : Portorož, Slovenia, August 30 - September 1, 2006 : proceedings
2006
/
p. 1715-1720 : ill. [CD-ROM]
https://ieeexplore.ieee.org/document/4778652
book article
138
journal article
Moore'i seadus ja tehnoloogia areng
Toomsalu, Arvo
Arvutustehnika ja Andmetöötlus
1997
/
9, lk. 3-10
journal article
139
book article
Multimeedia ülekanne piiratud ressursside puhul
Kulmar, Marika
Telekommunikatsioon 2002 : IX rahvusvahelise telekommunikatsioonipäeva materjalid
2002
/
lk. 36-45 : ill
book article
140
journal article
Multimeediumisüsteemide riistvara
Toomsalu, Arvo
Arvutustehnika ja Andmetöötlus
1997
/
10, lk. 7-16
journal article
141
book article
Mutation analysis for systemC designs at TLM
Guarnieri, Valerio
;
Bombieri, Nicola
;
Pravadelli, Graziano
;
Fummi, Franco
;
Hantson, Hanno
;
Raik, Jaan
;
Jenihhin, Maksim
;
Ubar, Raimund-Johannes
12th IEEE Latin American Test Workshop (LATW) : Porto de Galinhas, Brasil, 27-30 March 2011
2011
/
[6] p
https://ieeexplore.ieee.org/document/5985925
book article
142
dissertation
Mutation-based verification and error correction in high-level designs = Mutatsioonidel põhinev verifitseerimine ja vigade parandamine kõrgtaseme skeemides
Hantson, Hanno
2015
https://www.ester.ee/record=b4518212*est
dissertation
143
book article
Mutations for testing hardware and correcting design errors
Hantson, Hanno
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve
2011
/
p. 105-108 : ill
book article
144
journal article
NATO kursus riist- ja tarkvara koosdisainist
Tammemäe, Kalle
Arvutustehnika ja Andmetöötlus
1995
/
9, lk. 23-24; 10, lk. 2-8; 11, lk. 2-7; 12, lk. 8-15
journal article
145
book article
NeuroPIM: felxible neural accelerator for processing-in-memory architectures
Bidgoli, Ali Monavari
;
Fattahi, Sepideh
;
Rezaei, Seyyed Hossein Seyyedaghaei
;
Modarressi, Mehdi
;
Daneshtalab, Masoud
2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) : May 3-5, 2023, Tallin, Estonia : proceedings
2023
/
p. 51-56
https://doi.org/10.1109/DDECS57882.2023.10139567
book article
146
book article
New built-in self-test scheme for SoC interconnect
Jutman, Artur
;
Ubar, Raimund-Johannes
;
Raik, Jaan
The 9th World Multi-Conference on Systemics, Cybernetics and Informatics : WMSCI 2005 : July 10-13, 2005, Orlando, Florida, USA. Vol. IV
2005
/
p. 19-24 : ill
https://www.researchgate.net/publication/237375234_New_Built-In_Self-Test_Scheme_for_SoC_Interconnect
book article
147
book article
Novel architectures for contractive autoencoders with embedded learning
Kerner, Madis
;
Tammemäe, Kalle
;
Raik, Jaan
;
Hollstein, Thomas
2020 17th Biennial Baltic electronics conference, Tallinn, Estonia, October 6-8, 2020 : proceedings
2020
/
6 p. : ill
https://doi.org/10.1109/BEC49624.2020.9277246
book article
Related publications
1
Novel Neural Network accelerator architectures for FPGAs = Uudsed närvivõrkude kiirendite arhitektuurid FPGAdele
148
dissertation
Novel Neural Network accelerator architectures for FPGAs = Uudsed närvivõrkude kiirendite arhitektuurid FPGAdele
Kerner, Madis
2024
https://www.ester.ee/record=b5675484*est
https://digikogu.taltech.ee/et/Item/3568fe35-19c3-43e6-9525-73c79371ab13
https://doi.org/10.23658/taltech.16/2024
dissertation
Related publications
3
Novel architectures for contractive autoencoders with embedded learning
An efficient FPGA-based architecture for contractive autoencoders
Triple fixed-point MAC unit for deep learning
149
journal article
On the reuse of TLM mutation analysis at RTL
Guarnieri, Valerio
;
Hantson, Hanno
;
Raik, Jaan
;
Jenihhin, Maksim
;
Ubar, Raimund-Johannes
Journal of electronic testing : theory and applications
2012
/
p. 435-448 : ill
https://link.springer.com/article/10.1007/s10836-012-5303-6
journal article
150
dissertation
On the use of defensive schemes for hardware security = Kaitseskeemid riistvara turvalisuse tagamiseks
Eslami, Mohammad
2024
https://www.ester.ee/record=b5701420*est
https://doi.org/10.23658/taltech.53/2024
https://digikogu.taltech.ee/et/Item/068530be-4810-4489-9604-fb838d298b45
dissertation
Related publications
4
Reusing verification assertions as security checkers for Hardware Trojan detection
Benchmarking advanced security closure of physical layouts
SCARF : securing chips with a robust framework against fabrication-time hardware Trojans : preprint
SALSy : security-aware layout synthesis
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