QoSinNoC: analysis of QoS-aware NoC architectures for mixed-criticality applications
author
Avramenko, Serhiy
Azad, Siavoosh Payandeh
Niazmand, Behrad
Raik, Jaan
Jenihhin, Maksim
statement of authorship
Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
source
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems : DDECS 2018 : Budapest, Hungary 25-27 April, 2018 : proceedings
location of publication
Piscataway
publisher
IEEE
year of publication
2018
pages
p. 67-72 : ill
conference name, date
2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 25-27 April, 2018
conference location
Budapest, Hungary
url
https://doi.org/10.1109/DDECS.2018.00-10
subject term
kiipvõrgud
teenuste kvaliteet
subject of form
konverentsikogumikud
keyword
mixed-criticality applications
network-on-chip
quality-of-service
ISSN
2473-2117
ISBN
978-1-5386-5754-6
notes
Bibliogr.: 24 ref
TalTech department
arvutisüsteemide instituut
language
inglise
Reserch Group
Centre for trustworthy and efficient computing hardware (TECH)
Centre of dependable computing systems