Sklyarov, V., Skliarova, I., Rjabov, A., Sudnitsõn, A.

Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems

author

Sklyarov, Valery

Skliarova, Iouliia

Rjabov, Artjom

Sudnitsõn, Aleksander

statement of authorship

Valery Sklyarov, Iouliia Skliarova, Artjom Rjabov, and Alexander Sudnitson

source

Proceedings of the Estonian Academy of Sciences

journal volume number month

vol. 66, 3

year of publication

2017

pages

p. 323-335 : ill

url

https://doi.org/10.3176/proc.2017.3.07

http://www.ester.ee/record=b2355998*est

subject term

andmed

arvuti arhitektuur

sortimine (informaatika)

riistvara

tarkvara

keyword

parallel data processing

merging

iterative networks

communication-time processing

Field-Programmable Gate Array (FPGA)

Peripheral Component Interconnect (PCI) express bus

ISSN

1736-6046

notes

Bibliogr.: 26 ref

Kokkuvõte: Kiired iteratiivsed ahelad ja RAM-i baasil ühendajad, kiirendamaks andmete sortimist riist- ning tarkvara süsteemides

TTÜ department

arvutisüsteemide instituut

language

inglise

Sklyarov, V., Skliarova, I., Rjabov, A., Sudnitsõn, A. Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems // Proceedings of the Estonian Academy of Sciences (2017) vol. 66, 3, p. 323-335 : ill. https://doi.org/10.3176/proc.2017.3.07 http://www.ester.ee/record=b2355998*est