Ultra-low latency NoC testing via pseudo-random test pattern compaction
author
statement of authorship
Herve’ Tatenguemy, ... Vineeth Govind, Jaan Raik, ... [et al.]
source
SoC 2012 : International Symposium on System-on-Chip 2012 : Tampere, Finland, October 11-12, 2012
location of publication
[S.l.]
publisher
year of publication
pages
6 p. : ill
conference name, date
International Symposium on System-on-Chip, October 10-12, 2012
conference location
Tampere, Finland
subject term
ISBN
978-1-4673-2896-8
notes
Bibliogr.: 22 ref
language
inglise
Tatenguem, H., Govind, V., Raik, J. et al. Ultra-low latency NoC testing via pseudo-random test pattern compaction // SoC 2012 : International Symposium on System-on-Chip 2012 : Tampere, Finland, October 11-12, 2012. [S.l.] : IEEE, 2012. 6 p. : ill. https://ieeexplore.ieee.org/document/6376370