Defect-oriented fault simulation and test generation in digital circuits
statement of authorship
W.Kuzmicz, W.Pleskacz, J.Raik, R.Ubar
source
IEEE ISQED 2001 : proceedings of the IEEE 2001 2nd International Symposium on Quality Electronic Design : March 26-28, 2001, San Jose, California
location of publication
Los Alamitos, CA
publisher
year of publication
pages
p. 365-371
ISBN
0-7695-1025-6
notes
Bibliogr.: 10 ref
Kuzmicz, W., Pleskacz, W., Raik, J., Ubar, R. Defect-oriented fault simulation and test generation in digital circuits // IEEE ISQED 2001 : proceedings of the IEEE 2001 2nd International Symposium on Quality Electronic Design : March 26-28, 2001, San Jose, California. Los Alamitos, CA : IEEE Computer Society, 2001. p. 365-371. https://ieeexplore.ieee.org/document/915257