Logic IP for low-cost IC design in advanced CMOS nodes
author
Isgenc, Mehmet Meric
Martins, Mayler G.A.
Zackriya, V. Mohammed
Pagliarini, Samuel Nascimento
Pileggi, Larry
statement of authorship
Mehmet Meric Isgenc, Mayler G. A. Martins, V. Mohammed Zackriya, Samuel N. Pagliarini, Larry Pileggi
source
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
publisher
IEEE
journal volume number month
vol. 28, no. 2
year of publication
2020
pages
p. 585-595
url
https://doi.org//10.1109/TVLSI.2019.2942825
subject term
arvuti arhitektuur
mikroprotsessorid
integraallülitused
disain
keyword
Pins
Routing
Layout
Computer architecture
Microprocessors
Libraries
CMOS scaling
digital integrated circuit (IC) design
layout patterns
logic cell library
routing closure
ISSN
1063-8210
557-9999
notes
Bibliogr.: 29 ref
TalTech department
arvutisüsteemide instituut
language
inglise
Reserch Group
Centre for hardware security