Shared Structurally Synthesized BDDs for speeding-up parallel pattern simulation in digital circuits
author
Ubar, Raimund-Johannes
Jürimägi, Lembit
Raik, Jaan
statement of authorship
Raimund Ubar, Lembit Jürimägi, Jaan Raik
source
2015 Nordic Circuits and Systems Conference (NORCAS) : NORCHIP & International Symposium on System-on-Chip (SoC) : 1st IEEE NORCAS Conference : 26-28 October 2015, Oslo, Norway
location of publication
[S.l.]
publisher
IEEE
year of publication
2015
pages
[4] p. : ill
conference name, date
1st IEEE NORCAS Conference, 26-28 October, 2015
conference location
Oslo, Norway
url
http://dx.doi.org/10.1109/NORCHIP.2015.7364406
subject term
digitaalsidud
elektronlülitused
rikked
diagnostika (tehnika)
kompuutersimulatsioon
keyword
combinational and sequential circuits
BDDs
minimization of BDDs
SSBDDs
S3BDDs
fault simulation
ISBN
978-1-4673-6576-5
notes
Bibliogr.: 20 ref
TTÜ department
arvutitehnika instituut
language
inglise