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journal article

Acceleration of recursive data sorting over tree-based structuresMihhailov, Dmitri; Sudnitsõn, Aleksander; Sklyarov, Valery; Skliarova, IouliiaElektronika ir elektrotechnika = Electronics and electrical engineering2011 / p. 51-56 : ill https://eejournal.ktu.lt/index.php/elt/article/view/612

journal article

2

journal article

Algorithms of functional level testability analysis for digital circuitsUbar, Raimund-Johannes; Kuchcinski, KtzysztofPeriodica polytechnica. Electrical engineering1992 / 3/4, p. 295-308

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3

book article

Approaches to improve hierarchical ATPG for synchronous sequential circuitsViilukas, TaaviInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kuuenda aastakonverentsi artiklite kogumik : 3.-5. oktoobril 2012, Laulasmaa2012 / p. 105-108 : ill

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4

book article

Automated test pattern generator with constraint solverViilukas, Taavi; Raik, JaanInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 33-36

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book article

Automatic synthesis of asynchronous circuits from synchronous RTL descriptionsÖberg, Johnny; Plosila, Juha; Ellervee, PeeterProceedings 23rd NORCHIP Conference : Oulu, Finland, 21-22 November 20052005 / p. 200-205 : ill https://ieeexplore.ieee.org/document/1597024/keywords#keywords

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6

book article

Back-traced deductive-parallel fault simulation for digital systemsHahanov, Vladimir; Ubar, Raimund-Johannes; Hyduke, StanleyProceedings : Euromicro Symposium on Digital System Design : Belek-Antalya, Turkey, September 1st to 6th, 20032003 / p. 370-377 : ill https://ieeexplore.ieee.org/document/1231969

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book article

Boolean fault dignosis with structurally synthesized BDDsUbar, Raimund-JohannesRecent progress in the Boolean domain2014 / p. 303-331 : ill

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8

book article

Collaborative distributed computing in the field of digital electronics testingIvask, Eero; Devadze, Sergei; Ubar, Raimund-JohannesBalanced Automation Systems for Future Manufacturing Networks : 9th IFIP WG 5.5 International Conference : BASYS 2010 : Valencia, Spain, July 21-23, 2010 : proceedings2010 / p. 145-152

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9

book article

Collaborative distributed fault simulation for digital electronic circuitsIvask, Eero; Devadze, Sergei; Ubar, Raimund-JohannesIntelligent Distributed Computing IV : proceedings of the 4th International Symposium on Intelligent Distributed Computing - IDC 2010 : Tangier, Morocco, September 20102010 / p. 67-76

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10

book article

Constraint-based hierarchical untestability identification for synchronous sequential circuitsRaik, Jaan; Rannaste, Anna; Jenihhin, Maksim; Viilukas, Taavi; Ubar, Raimund-Johannes; Fujiwara, HideoSixteenth IEEE European Test Symposium : 23-27 May 2011, Trondheim2011 / p. 147-152

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11

book article

Constraint-based hierarchical untestability identification for syncronous sequential circuitsViilukas, Taavi; Raik, Jaan; Ubar, Raimund-Johannes; Rannaste, Anna; Jenihhin, Maksim; Fujiwara, HideoInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve2011 / p. 139-142 : ill

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dissertation

Constraints solving based hierarchical test generation for synchronous sequential circuits = Kitsenduste lahendamisel baseeruv hierarhiline testigenereerimine sünkroonsetele järjestikskeemideleViilukas, Taavi2012 https://www.ester.ee/record=b2888278*est

dissertation

13

book article

Decision diagrams for diagnostic modelingUbar, Raimund-JohannesMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 43

book article

14

book article

Defect-oriented modul-level fault diagnosis in digital circuitsKostin, Sergei; Ubar, Raimund-Johannes; Raik, JaanProceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany2011 / p. 81-86

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15

book article

Defect-oriented test- and layout-generation for standard-cell ASIC designsSudbrock, Joachim; Raik, Jaan; Ubar, Raimund-Johannes; Kuzmicz, Wieslaw; Pleskacz, Witold A.Proceedings : DSD'2005 : 8th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : Porto, Portugal, August 30 - September 3, 20052005 / p. 79-82 : ill https://ieeexplore.ieee.org/document/1559781

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book article

Description of digital objects with alternative graphs for test generation purposesUbar, Raimund-Johannes; Lohuaru, TõnuFault Tolerant Systems and Diagnostics : XI. International Conference ; Proceedings ; Suhl, June 6-9, 19881988 / p. [?]

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book

Design and test technology for dependable systems-on-chip2011 https://www.ester.ee/record=b4467408*est

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book article

Design error diagnosis using backtrace algorithm on decision diagramsRepinski, Urmas; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, AntonInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / p. 93-96

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book article

Design obfuscation versus testFarahmandi, Farimah; Sinanoglu, Ozgur; Blanton, Ronald; Pagliarini, Samuel Nascimento2020 IEEE European Test Symposium (ETS) : ETS 2020, May 25 - 29, 2020, Tallinn, Estonia2020 / 10 p https://doi.org/10.1109/ETS48528.2020.9131590

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book

Design of FPGA-based circuits using hierarchical finite state machinesSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander2012 http://www.ester.ee/record=b2857138*est

book

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dissertation

DfT-based external test and diagnosis of mesh-like networks on chips = Testitavusel põhinev välise testi ja diagnoosi meetod kahemõõtmelistele kiipvõrkudeleGovind, Vineeth2009 https://digi.lib.ttu.ee/i/?454 https://www.ester.ee/record=b2539211*est

dissertation

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dissertation

Digital test in WEB-based environmentIvask, Eero2006 https://www.ester.ee/record=b2158119*est

dissertation

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journal article

Dynamic analysis of digital circuits with multi-valued simulationUbar, Raimund-JohannesMicroelectronics journal1998 / 11, p. 821-826: ill

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book article

Evalutionary two-criteria optimization of finite state machinesSpitšakova, MargaritaInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 101-104

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25

book article

Evolutionary approach to the functional test generation for digital circuitsSkobtsov, Y.A.; Ivanov, D.E.; Skobtsov, V.Y.; Ubar, Raimund-JohannesBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 229-232 : ill

book article

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