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elektronlülitused (subject term)
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1
book article
A scalable technique to identify true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
Proceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany
2017
/
p. 152-157 : ill
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553
book article
2
book article
A tool set for teaching design-for-testability of digital circuits
Kostin, Sergei
;
Orasson, Elmet
;
Ubar, Raimund-Johannes
EWME 2016 : 11th European Workshop on Microelectronics Education : May 11-13, 2016, Southampton, UK
2016
/
[6] p. : ill
http://dx.doi.org/10.1109/EWME.2016.7496466
book article
3
book
Boole'i algebra kasutamine automaatikalülituste projekteerimisel : loengukonspekt
Agur, Ustus
1972
https://www.ester.ee/record=b1327567*est
book
4
journal article
Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs
Jürimägi, Lembit
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Raik, Jaan
Microprocessors and microsystems
2020
/
art. 103117, 12 p
https://doi.org/10.1016/j.micpro.2020.103117
journal article
5
book article
Combinational fault simulation in sequential circuits
Ubar, Raimund-Johannes
;
Kõusaar, Jaak
;
Gorev, Maksim
;
Devadze, Sergei
2015 IEEE International Symposium on Circuits and Systems : 24-27 May 2015, Lisboa, Portugal : [proceedings]
2015
/
p. 2876-2879 : ill
book article
6
book article
Complex delay fault reasoning with sequential 7-valued algebra
Kõusaar, Jaak
;
Ubar, Raimund-Johannes
;
Aleksejev, Igor
2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 2015
2015
/
[6] p. : ill
http://dx.doi.org/10.1109/LATW.2015.7102403
book article
7
book
Computational aspects of nodal method for simulation of electronic circuits
Laksberg, Edgar
1983
book
8
journal article
Computer-aided examination of the I²L current source and the behaviour of the I²L flip-flop used in static memory cells
Rang, Toomas
Periodica polytechnica. Electrical engineering = Электротехника
1981
/
p. 159-165 : joon
https://www.ester.ee/record=b1198855*est
https://pp.bme.hu/ee/article/view/4776/3881
journal article
9
book article
Conditional fault collapsing in digital circuits with shared structurally synthesized BDDs [Online resource]
Jürimägi, Lembit
;
Ubar, Raimund-Johannes
BEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 2018
2018
/
4 p. : ill
https://doi.org/10.1109/BEC.2018.8600967
book article
10
book article
Critical path tracing based simulation of transition delay faults
Kõusaar, Jaak
;
Ubar, Raimund-Johannes
;
Devadze, Sergei
;
Raik, Jaan
2014 17th Euromicro Conference on Digital System Design : DSD 2014 : 27-29 August 2014, Verona, Italy : proceedings
2014
/
p. 108-113 : ill
book article
11
book article
Critical path tracing based simulation of transition delay faults
Kõusaar, Jaak
;
Ubar, Raimund-Johannes
;
Devadze, Sergei
;
Raik, Jaan
Proceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere
2014
/
p. 61-66 : ill
book article
12
journal article
Design error diagnosis in digital circuits with stuck-at fault model
Jutman, Artur
;
Ubar, Raimund-Johannes
Microelectronics reliability
2000
/
2, p. 307-320 : ill
journal article
13
book
Digitaalsüsteemide diagnostika
Ubar, Raimund-Johannes
2005
http://www.ester.ee/record=b2097071*est
book
14
book article
Ein universeller Weg zur Automatisierung des Testentwurfs für digitale Objecte
Ubar, Raimund-Johannes
;
Lohuaru, Tõnu
Fehler in Automaten
1989
/
S. 16-30 : Ill
book article
15
book
Electronic circuits : examples for project based subject "Technologies of electronic products"
Sillakivi, Peeter
;
Tamm, Uljas
2003
https://www.ester.ee/record=b1828290*est
book
16
book
Elektronlülitused : näidisskeemid projektipõhilisele õppeainele "Elektrontoodete tehnoloogiad"
2003
https://www.ester.ee/record=b1828299*est
book
17
book
European Test Symposium : ETS 2005 : 22-25 May 2005, Tallinn, Estonia : proceedings
Cantarella, JD
2005
https://www.ester.ee/record=b2300865*est
book
18
journal article
Exact parallel critical path fault tracing to speed-up fault simulation in sequential circuits
Kõusaar, Jaak
;
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Devadze, Sergei
;
Raik, Jaan
International journal of microelectronics and computer science
2018
/
p. 9−18
https://ijmcs.dmcs.pl/web/guest/vol.-9-no.-1
https://ijmcs.dmcs.pl/documents/10630/345460/IJMCS_1_2018_2.pdf
journal article
19
journal article
Fast identification of true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
;
Jürimägi, Lembit
Microelectronics reliability
2018
/
p. 252-261 : ill
https://doi.org/10.1016/j.microrel.2017.11.027
journal article
20
book article
Fault simulation with parallel exact critical path tracing in multiple core environment
Gorev, Maksim
;
Ubar, Raimund-Johannes
;
Devadze, Sergei
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 9-13 March 2015, Grenoble, France
2015
/
p. 1180-1185 : ill
book article
21
book
Handbook of testing electronic systems
Novak, Ondrej
;
Gramatova, Elena
;
Ubar, Raimund-Johannes
;
Jutman, Artur
;
Raik, Jaan
2005
https://www.ester.ee/record=b2102523*est
book
22
book article
Hierarchical identification of NBTI-critical gates in nanoscale logic
Kostin, Sergei
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
LATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 2014
2014
/
[6] p. : ill
book article
23
book article
Hierarchical identification of untestable faults in sequential circuits
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Krivenko, Anna
;
Kruus, Margus
10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings
2007
/
p. 668-671 : ill
http://dx.doi.org/10.1109/DSD.2007.4341539
book article
24
journal article
Identification and rejuvenation of NBTI-critical logic paths in nanoscale circuits
Jenihhin, Maksim
;
Squillero, Giovanni
;
Tihhomirov, Valentin
;
Kostin, Sergei
;
Raik, Jaan
;
Ubar, Raimund-Johannes
Journal of electronic testing : theory and applications (JETTA)
2016
/
p. 273-289 : ill
http://dx.doi.org/10.1007/s10836-016-5589-x
journal article
25
book article
Identification and rejuvenation of NBTI-critical paths in nanoscale logic circuits
Jenihhin, Maksim
1st International Workshop on Reliability and Aging in Forthcoming Electronic Systems : May 28-29, 2015, Cluj-Napoca, Romania
2015
/
[1] p
book article
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