print

Hardware trojan insertion in finalized layouts : from methodology to a silicon demonstration

author
Perez, Tiago Diadami
Pagliarini, Samuel Nascimento
statement of authorship
Tiago Perez, Samuel Pagliarini
source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
publisher
IEEE
journal volume number month
vol. 42, 7
year of publication
2023
pages
p. 2094-2107
url
https://doi.org/10.1109/TCAD.2022.3223846
subject term
riistvara
arvuti arhitektuur
valutehased
mikroprotsessorid
arvutiturve
keyword
ASIC
Clocks
Computer architecture
Foundries
hardware security
hardware trojan horse
Integrated circuits
Layout
manufacturing-time attack
Microprocessors
side-channel trojan
Trojan horses
VLSI
ISSN
0278-0070
notes
Bibliogr.: 38 ref
Open Access
Open Access (hübriid)
Open Access (pronks)
scientific publication
teaduspublikatsioon
classifier
1.1
Scopus
Journal metrics at Scopus
Article at Scopus
WOS
Journal metrics at WOS
Article at WOS
category (general)
Computer science
Engineering
category (sub)
Computer science. Computer graphics and computer-aided design
Engineering. Electrical and electronic engineering
Computer science. Software
kvartiil
Q2
TTÜ department
arvutisüsteemide instituut
language
inglise
Uurimisrühm
Centre for hardware security
Perez, T., Pagliarini, S. Hardware trojan insertion in finalized layouts : from methodology to a silicon demonstration // IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2023) vol. 42, 7, p. 2094-2107. https://doi.org/10.1109/TCAD.2022.3223846