Settling time minimization in PLL frequency synthesizers (title)

types of item

  • book article
    Settling time minimization in PLL frequency synthesizersMin, Mart; Männama, Vello; Paavle, ToivoICCSC'02 : 1st IEEE International Conference on Circuits and Systems for Communications, 26-28 June, 2002, St.Petersburg, Russia : proceedings2002 / p. 366-369 : ill https://ieeexplore.ieee.org/document/1029117
    book article
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