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gate and register transfer levels (keyword)
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book article
Bringing research issues into lab scenarios on the example of SoC testing [Electronic resource]
Ubar, Raimund-Johannes
;
Jutman, Artur
;
Devadze, Sergei
;
Wuttke, Heinz-Dietrich
International Conference on Engineering Education - ICEE 2007 : September 3-7, 2007, Coimbra, Portugal
2007
/
[7] p. : ill. [CD-ROM]
http://icee2007.dei.uc.pt/proceedings/papers/429.pdf
book article
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keyword
41
1.
gate and register transfer levels
2.
register transfer and gate level simulation
3.
Register Transfer Level - RTL
4.
register transfer level modeling decision diagams
5.
register-transfer level
6.
diffusion (mass transfer, heat transfer)
7.
Swedish Cancer Register
8.
Field Programmable Gate Array (FPGA)
9.
field programmable gate arrays
10.
field-programmable gate array
11.
Field-Programmable Gate Array (FPGA)
12.
field-programmable gate arrays
13.
FPGA (field-programmable gate array)
14.
GaTe
15.
gate delay
16.
gate driver
17.
Gate Injection Transistor (GIT)
18.
gate-level analysis
19.
gate-level circuit abstraction
20.
gate-level netlist
21.
Golden gate assembly
22.
insulated gate bipolar transistors
23.
insulated gate-commutated thyristors
24.
NBTI-critical gate
25.
Opal Kelly field programmable gate array (FPGA)
26.
all educational levels
27.
deep energy levels
28.
deep levels
29.
energy levels
30.
excitation levels
31.
extreme sea levels
32.
extreme water levels
33.
hierarchy levels
34.
legal text levels
35.
levels of competition
36.
micro-, meso- and macro-levels
37.
ontological levels
38.
risk levels
39.
spectral levels
40.
stressor levels
41.
water levels
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