Toggle navigation
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Databases
Publications
Searching
My bookmarks
0
gate-level analysis (keyword)
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
Add criteria
Advanced search
filter
Clear
×
types of item
book
..
journal article
..
newspaper article
..
book article
..
dissertation
..
Open Access
..
Scientific publications
..
year
year of publication
Loading..
author
Loading..
TalTech department
Loading..
subject term
Loading..
series
Loading..
name of the person
Loading..
keyword
Loading..
Clear
Number of records
3
Look more..
(2/158)
Export
export all inquiry results
(3)
Save TXT fail
Save PDF fail
print
Open for editing with marked entries
my bookmarks
display
Bibliographic view
Short view
sort
author ascending
author descending
year of publication ascending
year of publication descending
title ascending
title descending
1
journal article EST
/
journal article ENG
Fast identification of true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
;
Jürimägi, Lembit
Microelectronics reliability
2018
/
p. 252-261 : ill
https://doi.org/10.1016/j.microrel.2017.11.027
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
2
book article
Hierarchical timing-critical paths analysis in sequential circuits
Jürimägi, Lembit
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Raik, Jaan
;
Devadze, Sergei
;
Kostin, Sergei
2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain
2018
/
6 p. : ill
https://doi.org/10.1109/PATMOS.2018.8464176
book article
3
book article
A scalable technique to identify true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
Proceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany
2017
/
p. 152-157 : ill
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553
book article
Number of records 3, displaying
1 - 3
keyword
157
1.
gate-level analysis
2.
gate-level circuit abstraction
3.
gate-level netlist
4.
register transfer and gate level simulation
5.
hierarchical two-level analysis
6.
system-level analysis
7.
logic level and high level BDDs
8.
Field Programmable Gate Array (FPGA)
9.
field programmable gate arrays
10.
field-programmable gate array
11.
Field-Programmable Gate Array (FPGA)
12.
field-programmable gate arrays
13.
field-programmable gate arrays (FPGA)
14.
FPGA (field-programmable gate array)
15.
GaTe
16.
gate and register transfer levels
17.
gate delay
18.
gate driver
19.
Gate Injection Transistor (GIT)
20.
Golden gate assembly
21.
insulated gate bipolar transistors
22.
insulated gate-commutated thyristors
23.
NBTI-critical gate
24.
Opal Kelly field programmable gate array (FPGA)
25.
absolute sea level
26.
airport level of service
27.
arousal level
28.
assurance level
29.
behaviour level test generation
30.
bi-level optimization
31.
CO2 level in classrooms
32.
CO2 level in classrooms and kindergartens
33.
confidence level
34.
country-level logistics
35.
Cross-level Modeling of Faults in Digital Systems
36.
customer compatibility level
37.
deep level
38.
deep level traps
39.
determination of the CO2 level
40.
determining the level of creatine
41.
digitalisation level
42.
distribution-level phasor measurement units (D-PMUs)
43.
education level
44.
exposure level
45.
extreme penetration level of non synchronous generation
46.
extreme water level
47.
graduate level
48.
Hierarchical Multi-level Test Generation
49.
high level DD (HLDD)
50.
high level synthesis
51.
high-level control fault model
52.
high-level control faults
53.
high-level decision diagram
54.
high-level decision diagrams
55.
high-level decision diagrams (HLDD) synthesis
56.
High-level Decision Diagrams for Modeling Digital Systems
57.
high-level expert group on AI
58.
high-level fault coverage
59.
high-level fault model
60.
high-level fault simulation
61.
high-level functional fault model
62.
high-level synthesis
63.
High-Level Synthesis (HLS)
64.
high-level synthesis for test
65.
high-level test data generation
66.
improvement of safety level at enterprises
67.
improvement of safety level at SMEs
68.
lake level
69.
level control
70.
level crossing
71.
Level of paranoia
72.
level set
73.
level(s) methodology
74.
level-crossing ADC
75.
level-crossing analog-to-digital converters
76.
level-crossing analogue-to-digital converters (ADC)
77.
logic level
78.
lower trophic level models
79.
low-level control system transportation
80.
low-level fault redundancy
81.
low-level radiation
82.
Low-level RF EMF
83.
macro-level industry influences
84.
mean sea level
85.
module level power electronics (MLPE)
86.
module-level power electronics (MLPE)
87.
multi-level governance
88.
multi-level inverter
89.
multi-level leadership
90.
multi-level modeling
91.
multi-level perspective
92.
multi-level perspective of sustainability transitions
93.
multi-level selection and processing environment
94.
noise level
95.
operational level (OL)
96.
Price level
97.
Process/Product Sigma Performance Level (PSPL)
98.
PV module level power electronics
99.
Register Transfer Level - RTL
100.
register transfer level modeling decision diagams
101.
register-transfer level
102.
relative sea level
103.
relative sea level changes
104.
relative sea-level change
105.
RH level
106.
school-level policies
107.
sea level
108.
sea level forecasting
109.
sea level prediction
110.
sea level rise
111.
sea level series
112.
sea level trend
113.
sea level: variations and mean
114.
sea-level
115.
sea-level changes
116.
sea-level equation
117.
Sea-level indicator
118.
sea-level prediction
119.
sea-level rise
120.
sea-level trend
121.
service-level agreements
122.
seven-level multilevel
123.
Sigma performance level
124.
skin conductance level
125.
software level TMR
126.
steel-level bureaucracy
127.
strategic level decision makers
128.
system level
129.
system level hazards
130.
system level test
131.
system planning level
132.
system-level evaluation
133.
task-level uninterrupted presence
134.
three-level
135.
three-level converter
136.
three-level inverter
137.
three-level neutral-point-clamped inverter
138.
three-level NPC inverter
139.
three-level T-type
140.
three-level T-type inverter
141.
three-level T-type quasi-impedance-source inverter (3L-T-type qZSI)
142.
three-level voltage inverter
143.
Tool Confidence Level
144.
top-level domain
145.
transaction-level modeling
146.
treatment level
147.
two-level inverter
148.
undergraduate level
149.
university level informatics education
150.
water level
151.
water level fluctuation
152.
water level measurements
153.
water level reconstruction
154.
water-level changes
155.
voltage level
156.
voltage level optimisation
157.
3-level T-type inverter
subject term
1
1.
Safety Gate
×
match
starts with
ends with
containes
sort
Relevance
ascending
descending
year of publication
author
TalTech department
subject term
series
name of the person
keyword
Otsing
Valikud
0
year of publication
AND
OR
NOT
author
AND
OR
NOT
TalTech department
AND
OR
NOT
subject term
AND
OR
NOT
series
AND
OR
NOT
name of the person
AND
OR
NOT
keyword
AND
OR
NOT