Toggle navigation
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Databases
Publications
Searching
My bookmarks
0
Gate-level graph representation learning : a step towards the improved stuck-at faults analysis (title)
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
Add criteria
Advanced search
filter
Clear
×
types of item
book
..
journal article
..
newspaper article
..
book article
..
dissertation
..
Open Access
..
Scientific publications
..
year
year of publication
Loading..
author
Loading..
TalTech department
Loading..
subject term
Loading..
series
Loading..
name of the person
Loading..
keyword
Loading..
Clear
Number of records
1
Look more..
(1/3)
Export
export all inquiry results
(1)
Save TXT fail
print
Open for editing with marked entries
my bookmarks
display
Bibliographic view
Short view
sort
author ascending
author descending
year of publication ascending
year of publication descending
title ascending
title descending
1
book article
Gate-level graph representation learning : a step towards the improved stuck-at faults analysis
Balakrishnan, Aneesh
;
Alexandrescu, Dan
;
Jenihhin, Maksim
;
Lange, Thomas
;
Glorieux, Maximilien
Proceedings of the Twenty Second International Symposium on Quality Electronic Design (ISQED) : Santa Clara, USA, 7-9 April 2021
2021
/
p. 24-30
https://doi.org/10.1109/ISQED51717.2021.9424256
book article
Related publications
1
A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks
Number of records 1, displaying
1 - 1
keyword
3
1.
gate-level analysis
2.
Single Stuck-at Faults
3.
stuck-at-faults
×
match
starts with
ends with
containes
sort
Relevance
ascending
descending
year of publication
author
TalTech department
subject term
series
name of the person
keyword
Otsing
Valikud
0
year of publication
AND
OR
NOT
author
AND
OR
NOT
TalTech department
AND
OR
NOT
subject term
AND
OR
NOT
series
AND
OR
NOT
name of the person
AND
OR
NOT
keyword
AND
OR
NOT