An iterative approach to test time minimization for parallel hybrid BIST architecture
statement of authorship
Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
source
5th IEEE Latin-American Test Workshop - LATW 2004 : Cartagena, Colombia, 2004 : digest of papers
location of publication
[S.l.]
publisher
year of publication
pages
p. 98-103 : ill
conference name, date
5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004
conference location
Cartagena, Colombia
notes
Bibliogr.: 14 ref
language
inglise
Ubar, R.-J., Jenihhin, M., Jervan, G., Peng, Z. An iterative approach to test time minimization for parallel hybrid BIST architecture // 5th IEEE Latin-American Test Workshop - LATW 2004 : Cartagena, Colombia, 2004 : digest of papers. [S.l.] : IEEE, 2004. p. 98-103 : ill.