An iterative approach to test time minimization for parallel hybrid BIST architecture
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Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
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5th IEEE Latin-American Test Workshop - LATW 2004 : Cartagena, Colombia, 2004 : digest of papers
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[S.l.]
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p. 98-103 : ill
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5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004
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Cartagena, Colombia
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Bibliogr.: 14 ref
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Ubar, R.-J., Jenihhin, M., Jervan, G., Peng, Z. An iterative approach to test time minimization for parallel hybrid BIST architecture // 5th IEEE Latin-American Test Workshop - LATW 2004 : Cartagena, Colombia, 2004 : digest of papers. [S.l.] : IEEE, 2004. p. 98-103 : ill.